llvm-project.git/llvm/lib/Target/Mips/MipsExpandPseudo.cpp, branch users/nico/python-2

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23T15:30:29+00:00

[Mips] Use ANDi in for zero-extend in subword atomic umax/umin for both r2 and pre-R2 (#89881)

2024-04-24T14:31:51+00:00

About unsigned max/min, ANDi is available for all ISA revisions in
extend before slt insn.
So that we can reduce one instruction.

[MIPS]: Rework atomic max/min expand for subword (#89575)

2024-04-22T18:08:12+00:00

The current code is so buggy: it can work for few cases. The problems
include:
1. ll/sc works on a whole word, while other parts other than we rmw are
dropped.
  2. The oprands are not well zero-extended for unsigned ops.
3. It doesn't work for big-endian, as the postion of subword differs
with little endian.

And in fact, we can set the return value correct in ll/sc scope, so we
can skip the sinkMBB.

[Mips] Restore wrong deletion of instruction 'and' in unsigned min/max processing. (#85902)

2024-03-24T06:35:42+00:00

Fix #61881

[Mips] Fix missing sign extension in expansion of sub-word atomic max (#77072)

2024-03-08T20:41:31+00:00

Add sign extension "SEB/SEH" before compare.

Fix #61881

[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC

2022-08-08T18:24:15+00:00

With C++17 there is no Clang pedantic warning or MSVC C5051.

[Target] use getSubtarget<> instead of static_cast<>(getSubtarget())

2022-05-26T18:22:41+00:00

Differential Revision: https://reviews.llvm.org/D125391

[Target] Use range-based for loops (NFC)

2021-11-22T16:21:07+00:00

[NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister.

2020-12-02T23:46:38+00:00

Typing the API appropriately.

Differential Revision: https://reviews.llvm.org/D92341

[Mips] Fix gcc -Wunused-but-set-variable in -DLLVM_ENABLE_ASSERTIONS=Off builds after D71028

2019-12-14T00:41:08+00:00