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<title>llvm-project.git/llvm/lib/Target/MSP430/MSP430Subtarget.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[MSP430] TableGen-erate SDNode descriptions (#138878)</title>
<updated>2025-05-09T10:44:53+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2025-05-09T10:44:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f9f2bf8e5e5c266a51b4ec6d23317a7e3dfeb670'/>
<id>f9f2bf8e5e5c266a51b4ec6d23317a7e3dfeb670</id>
<content type='text'>
This consolidates node definitions into one place and enables automatic
node verification.

Part of #119709.</content>
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<pre>
This consolidates node definitions into one place and enables automatic
node verification.

Part of #119709.</pre>
</div>
</content>
</entry>
<entry>
<title>[Target] Remove unused includes (NFC) (#116577)</title>
<updated>2024-11-18T15:19:50+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-18T15:19:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52'/>
<id>ed8019d9fbed2e6a6b08f8f73e9fa54a24f3ed52</id>
<content type='text'>
Identified with misc-include-cleaner.</content>
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Identified with misc-include-cleaner.</pre>
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</entry>
<entry>
<title>[MSP430] Add CFI instructions for MSP430.</title>
<updated>2023-04-05T22:53:01+00:00</updated>
<author>
<name>Ilia Kuklin</name>
<email>ikuklin@accesssoftek.com</email>
</author>
<published>2023-04-05T22:49:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9a9c6b8e7587d0459393024e793e299c96bde0d2'/>
<id>9a9c6b8e7587d0459393024e793e299c96bde0d2</id>
<content type='text'>
Implement emission of DWARF CFI instructions for MSP430. This includes descriptions of stack frame layout and location of callee-saved registers that could be used for backtracing.

Differential Revision: https://reviews.llvm.org/D146966
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Implement emission of DWARF CFI instructions for MSP430. This includes descriptions of stack frame layout and location of callee-saved registers that could be used for backtracing.

Differential Revision: https://reviews.llvm.org/D146966
</pre>
</div>
</content>
</entry>
<entry>
<title>[Target] Remove redundant member initialization (NFC)</title>
<updated>2022-01-07T06:01:44+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-01-07T06:01:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f3a344d2125fa37e59bae1b0874442c650a19607'/>
<id>f3a344d2125fa37e59bae1b0874442c650a19607</id>
<content type='text'>
Identified with readability-redundant-member-init.
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<pre>
Identified with readability-redundant-member-init.
</pre>
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</entry>
<entry>
<title>Revert "[llvm] Remove redundant member initialization (NFC)"</title>
<updated>2022-01-03T19:28:47+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-01-03T19:28:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e5947760c2e568c2090841a452aa8469cc66f6c8'/>
<id>e5947760c2e568c2090841a452aa8469cc66f6c8</id>
<content type='text'>
This reverts commit fd4808887ee47f3ec8a030e9211169ef4fb094c3.

This patch causes gcc to issue a lot of warnings like:

  warning: base class ‘class llvm::MCParsedAsmOperand’ should be
  explicitly initialized in the copy constructor [-Wextra]
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<pre>
This reverts commit fd4808887ee47f3ec8a030e9211169ef4fb094c3.

This patch causes gcc to issue a lot of warnings like:

  warning: base class ‘class llvm::MCParsedAsmOperand’ should be
  explicitly initialized in the copy constructor [-Wextra]
</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] Remove redundant member initialization (NFC)</title>
<updated>2022-01-02T00:18:18+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-01-02T00:18:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=fd4808887ee47f3ec8a030e9211169ef4fb094c3'/>
<id>fd4808887ee47f3ec8a030e9211169ef4fb094c3</id>
<content type='text'>
Identified with readability-redundant-member-init.
</content>
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<pre>
Identified with readability-redundant-member-init.
</pre>
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</content>
</entry>
<entry>
<title>Move TargetRegistry.(h|cpp) from Support to MC</title>
<updated>2021-10-08T21:51:48+00:00</updated>
<author>
<name>Reid Kleckner</name>
<email>rnk@google.com</email>
</author>
<published>2021-10-08T17:48:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=89b57061f7b769e9ea9bf6ed686e284f3e55affe'/>
<id>89b57061f7b769e9ea9bf6ed686e284f3e55affe</id>
<content type='text'>
This moves the registry higher in the LLVM library dependency stack.
Every client of the target registry needs to link against MC anyway to
actually use the target, so we might as well move this out of Support.

This allows us to ensure that Support doesn't have includes from MC/*.

Differential Revision: https://reviews.llvm.org/D111454
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<pre>
This moves the registry higher in the LLVM library dependency stack.
Every client of the target registry needs to link against MC anyway to
actually use the target, so we might as well move this out of Support.

This allows us to ensure that Support doesn't have includes from MC/*.

Differential Revision: https://reviews.llvm.org/D111454
</pre>
</div>
</content>
</entry>
<entry>
<title>[X86][MC][Target] Initial backend support a tune CPU to support -mtune</title>
<updated>2020-08-14T22:31:50+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@intel.com</email>
</author>
<published>2020-08-14T21:56:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c7a0b2684f74de5ba725d984cacd151863f9f803'/>
<id>c7a0b2684f74de5ba725d984cacd151863f9f803</id>
<content type='text'>
This patch implements initial backend support for a -mtune CPU controlled by a "tune-cpu" function attribute. If the attribute is not present X86 will use the resolved CPU from target-cpu attribute or command line.

This patch adds MC layer support a tune CPU. Each CPU now has two sets of features stored in their GenSubtargetInfo.inc tables . These features lists are passed separately to the Processor and ProcessorModel classes in tablegen. The tune list defaults to an empty list to avoid changes to non-X86. This annoyingly increases the size of static tables on all target as we now store 24 more bytes per CPU. I haven't quantified the overall impact, but I can if we're concerned.

One new test is added to X86 to show a few tuning features with mismatched tune-cpu and target-cpu/target-feature attributes to demonstrate independent control. Another new test is added to demonstrate that the scheduler model follows the tune CPU.

I have not added a -mtune to llc/opt or MC layer command line yet. With no attributes we'll just use the -mcpu for both. MC layer tools will always follow the normal CPU for tuning.

Differential Revision: https://reviews.llvm.org/D85165
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<pre>
This patch implements initial backend support for a -mtune CPU controlled by a "tune-cpu" function attribute. If the attribute is not present X86 will use the resolved CPU from target-cpu attribute or command line.

This patch adds MC layer support a tune CPU. Each CPU now has two sets of features stored in their GenSubtargetInfo.inc tables . These features lists are passed separately to the Processor and ProcessorModel classes in tablegen. The tune list defaults to an empty list to avoid changes to non-X86. This annoyingly increases the size of static tables on all target as we now store 24 more bytes per CPU. I haven't quantified the overall impact, but I can if we're concerned.

One new test is added to X86 to show a few tuning features with mismatched tune-cpu and target-cpu/target-feature attributes to demonstrate independent control. Another new test is added to demonstrate that the scheduler model follows the tune CPU.

I have not added a -mtune to llc/opt or MC layer command line yet. With no attributes we'll just use the -mcpu for both. MC layer tools will always follow the normal CPU for tuning.

Differential Revision: https://reviews.llvm.org/D85165
</pre>
</div>
</content>
</entry>
<entry>
<title>Make llvm::StringRef to std::string conversions explicit.</title>
<updated>2020-01-28T22:25:25+00:00</updated>
<author>
<name>Benjamin Kramer</name>
<email>benny.kra@googlemail.com</email>
</author>
<published>2020-01-28T19:23:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=adcd02683856c30ba6f349279509acecd90063df'/>
<id>adcd02683856c30ba6f349279509acecd90063df</id>
<content type='text'>
This is how it should've been and brings it more in line with
std::string_view. There should be no functional change here.

This is mostly mechanical from a custom clang-tidy check, with a lot of
manual fixups. It uncovers a lot of minor inefficiencies.

This doesn't actually modify StringRef yet, I'll do that in a follow-up.
</content>
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<pre>
This is how it should've been and brings it more in line with
std::string_view. There should be no functional change here.

This is mostly mechanical from a custom clang-tidy check, with a lot of
manual fixups. It uncovers a lot of minor inefficiencies.

This doesn't actually modify StringRef yet, I'll do that in a follow-up.
</pre>
</div>
</content>
</entry>
<entry>
<title>Update the file headers across all of the LLVM projects in the monorepo</title>
<updated>2019-01-19T08:50:56+00:00</updated>
<author>
<name>Chandler Carruth</name>
<email>chandlerc@gmail.com</email>
</author>
<published>2019-01-19T08:50:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=2946cd701067404b99c39fb29dc9c74bd7193eb3'/>
<id>2946cd701067404b99c39fb29dc9c74bd7193eb3</id>
<content type='text'>
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
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<pre>
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
</pre>
</div>
</content>
</entry>
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