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<title>llvm-project.git/llvm/lib/Target/ARM/MVEVPTBlockPass.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)</title>
<updated>2025-05-23T15:30:29+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-05-23T15:30:29+00:00</published>
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<pre>
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<entry>
<title>[ARM] Remove unused includes (NFC) (#116155)</title>
<updated>2024-11-14T07:11:14+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-14T07:11:14+00:00</published>
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<id>5be43db9b17e7cfc9e987f257221b0926551eb6e</id>
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Identified with misc-include-cleaner.</content>
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Identified with misc-include-cleaner.</pre>
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<entry>
<title>[CodeGen] Make the parameter TRI required in some functions. (#85968)</title>
<updated>2024-04-24T13:24:14+00:00</updated>
<author>
<name>Xu Zhang</name>
<email>simonzgx@gmail.com</email>
</author>
<published>2024-04-24T13:24:14+00:00</published>
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Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.</content>
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<pre>
Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.</pre>
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</entry>
<entry>
<title>[llvm] Stop including llvm/ADT/SmallSet.h (NFC)</title>
<updated>2023-11-11T20:32:15+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2023-11-11T20:32:15+00:00</published>
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<id>01702c3f7f1aa3a0e68f638bd829f7b4a8b40fa3</id>
<content type='text'>
Identified with clangd.
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<pre>
Identified with clangd.
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</entry>
<entry>
<title>[Target] use getSubtarget&lt;&gt; instead of static_cast&lt;&gt;(getSubtarget())</title>
<updated>2022-05-26T18:22:41+00:00</updated>
<author>
<name>Zongwei Lan</name>
<email>lanzongwei541@gmail.com</email>
</author>
<published>2022-05-26T18:22:41+00:00</published>
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<id>ad73ce318ef901545fa82d57a609c71af787e1e1</id>
<content type='text'>
Differential Revision: https://reviews.llvm.org/D125391
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<pre>
Differential Revision: https://reviews.llvm.org/D125391
</pre>
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</content>
</entry>
<entry>
<title>[ARM] Skip debug during vpt block creation</title>
<updated>2021-06-10T13:49:04+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2021-06-10T13:49:04+00:00</published>
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<id>9872551ca09b60f24d9090e7681de6fc9627ce33</id>
<content type='text'>
Debug info is currently preventing VPT block creation, leading to
different codegen. This patch attempts to skip any debug instructions
during vpt block creation, making sure they do not interfere.

Differential Revision: https://reviews.llvm.org/D103610
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Debug info is currently preventing VPT block creation, leading to
different codegen. This patch attempts to skip any debug instructions
during vpt block creation, making sure they do not interfere.

Differential Revision: https://reviews.llvm.org/D103610
</pre>
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</content>
</entry>
<entry>
<title>[ARM] Remove dead instructions before creating VPT block bundles</title>
<updated>2020-12-08T14:05:07+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2020-12-08T14:05:07+00:00</published>
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<id>91fb9eac0b562cdfdc6b677f8ab2ee67f1ae1a77</id>
<content type='text'>
We remove VPNOT instructions in VPT blocks as we create them, turning
them into else predicates. We don't remove the dead instructions until
after the block has been created though. Because the VPNOT will have
killed the vpr register it used, this makes finalizeBundle add internal
flags to the vpr uses of any instructions after the VPNOT. These
incorrect flags can then confuse what is alive and what is not, leading
to machine verifier problems.

This patch removes them earlier instead, before the bundle is finalized
so that kill flags remain valid.

Differential Revision: https://reviews.llvm.org/D92227
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<pre>
We remove VPNOT instructions in VPT blocks as we create them, turning
them into else predicates. We don't remove the dead instructions until
after the block has been created though. Because the VPNOT will have
killed the vpr register it used, this makes finalizeBundle add internal
flags to the vpr uses of any instructions after the VPNOT. These
incorrect flags can then confuse what is alive and what is not, leading
to machine verifier problems.

This patch removes them earlier instead, before the bundle is finalized
so that kill flags remain valid.

Differential Revision: https://reviews.llvm.org/D92227
</pre>
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</content>
</entry>
<entry>
<title>[ARM] Remove MI variable aliasing. NFC</title>
<updated>2020-11-09T18:18:43+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2020-11-09T18:18:43+00:00</published>
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<id>c8cd7e2bbf7e124ed09da2b27e09dd30e3562e46</id>
<content type='text'>
This was accidentally using the same name for two different variables in
the same line. Whilst it seems to work for some compilers, others have
trouble and it is probably not a fantastic idea.
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This was accidentally using the same name for two different variables in
the same line. Whilst it seems to work for some compilers, others have
trouble and it is probably not a fantastic idea.
</pre>
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</entry>
<entry>
<title>[ARM] Remove kill flags between VCMP and insertion point</title>
<updated>2020-11-09T13:17:53+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2020-11-09T13:17:53+00:00</published>
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<id>a0a9e1c7985252715afb0b081a461ea01613582f</id>
<content type='text'>
When we fold a VCMP into a VPST instruction any kill flags between the
old VCMP position and the new insertion point need to be removed, in
order to keep the verifier happy.

Differential Revision: https://reviews.llvm.org/D90964
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<pre>
When we fold a VCMP into a VPST instruction any kill flags between the
old VCMP position and the new insertion point need to be removed, in
order to keep the verifier happy.

Differential Revision: https://reviews.llvm.org/D90964
</pre>
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</content>
</entry>
<entry>
<title>[Target][ARM] Replace outdated getARMVPTBlockMask function</title>
<updated>2020-05-12T11:10:15+00:00</updated>
<author>
<name>Pierre-vh</name>
<email>pierre.vanhoutryve@arm.com</email>
</author>
<published>2020-04-08T10:55:09+00:00</published>
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<id>24bf8063d677f261f26d8771180cc08d51007a2e</id>
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getARMVPTBlockMask was an outdated function that only handled basic
block masks: T, TT, TTT and TTTT. This worked fine before the MVE
VPT Block Insertion Pass improvements as it was the only kind of
masks that it could generate, but now it can generate more complex
masks that uses E predicates, so it's dangerous to use that function
to calculate VPT/VPST block masks.

I replaced it with 2 different functions:
  - expandPredBlockMask, in ARMBaseInfo. This adds an "E" or "T" at
    the end of an existing PredBlockMask.
  - recomputeVPTBlockMask, in Thumb2InstrInfo. This takes an iterator
    to a VPT/VPST instruction and recomputes its block mask by looking
    at the predicated instructions that follows it. This should be
    used to recompute a block mask after removing/adding a predicated
    instruction to the block.

The expandPredBlockMask function is pretty much imported from the MVE
VPT Blocks pass.

I had to change the ARMLowOverheadLoops and MVEVPTBlocks passes as well
so they could use these new functions.

Differential Revision: https://reviews.llvm.org/D78201
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<pre>
getARMVPTBlockMask was an outdated function that only handled basic
block masks: T, TT, TTT and TTTT. This worked fine before the MVE
VPT Block Insertion Pass improvements as it was the only kind of
masks that it could generate, but now it can generate more complex
masks that uses E predicates, so it's dangerous to use that function
to calculate VPT/VPST block masks.

I replaced it with 2 different functions:
  - expandPredBlockMask, in ARMBaseInfo. This adds an "E" or "T" at
    the end of an existing PredBlockMask.
  - recomputeVPTBlockMask, in Thumb2InstrInfo. This takes an iterator
    to a VPT/VPST instruction and recomputes its block mask by looking
    at the predicated instructions that follows it. This should be
    used to recompute a block mask after removing/adding a predicated
    instruction to the block.

The expandPredBlockMask function is pretty much imported from the MVE
VPT Blocks pass.

I had to change the ARMLowOverheadLoops and MVEVPTBlocks passes as well
so they could use these new functions.

Differential Revision: https://reviews.llvm.org/D78201
</pre>
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