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<title>llvm-project.git/llvm/lib/Target/ARM/ARMSubtarget.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>ARM: Move ABI helpers from Subtarget to TargetMachine (#144680)</title>
<updated>2025-06-19T00:38:22+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-06-19T00:38:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=874a02f05b6ebb4b5dbe0ab09beb9c3d5b36e237'/>
<id>874a02f05b6ebb4b5dbe0ab09beb9c3d5b36e237</id>
<content type='text'>
These are module level concepts, and attaching them to the
function level subtarget is confusing. Similarly these other
helpers that only operate on the triple should also be removed
from the subtarget.</content>
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<pre>
These are module level concepts, and attaching them to the
function level subtarget is confusing. Similarly these other
helpers that only operate on the triple should also be removed
from the subtarget.</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] Remove unused local variables (NFC) (#138467)</title>
<updated>2025-05-04T20:05:18+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-05-04T20:05:18+00:00</published>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>Remove iOS 5 check for tailcalls on ARM (#133354)</title>
<updated>2025-04-04T23:02:39+00:00</updated>
<author>
<name>Un1q32</name>
<email>joey.t.reinhart@gmail.com</email>
</author>
<published>2025-04-04T23:02:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6f34d03b3132a8286630f8496aa7dce9605e677b'/>
<id>6f34d03b3132a8286630f8496aa7dce9605e677b</id>
<content type='text'>
Fixes #102053

The check was added in 8decdc472f308b13d7fb7fd50c3919db086c0417, and at
the time iOS 5 was the latest iOS version, before that commit tail calls
were disabled for all ARMv7 targets. Testing a build of wasm3 with the
patch on a device running iOS 3.0 shows a noticeable performance
improvement and no issues.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixes #102053

The check was added in 8decdc472f308b13d7fb7fd50c3919db086c0417, and at
the time iOS 5 was the latest iOS version, before that commit tail calls
were disabled for all ARMv7 targets. Testing a build of wasm3 with the
patch on a device running iOS 3.0 shows a noticeable performance
improvement and no issues.</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen] Use MCRegister for ignoreCSRForAllocationOrder. (#123685)</title>
<updated>2025-01-21T08:04:57+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-01-21T08:04:57+00:00</published>
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<id>7bb363bdd4e87ee0b1ded74ef2616643153ff756</id>
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</content>
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<pre>
</pre>
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</entry>
<entry>
<title>[ARM] Add Cortex-A510 CPU for AArch32 (#118811)</title>
<updated>2024-12-06T08:51:22+00:00</updated>
<author>
<name>Oliver Stannard</name>
<email>oliver.stannard@arm.com</email>
</author>
<published>2024-12-06T08:51:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=2d8e8dd2b83da113dd94f01c67fb8b3e3ce38cc9'/>
<id>2d8e8dd2b83da113dd94f01c67fb8b3e3ce38cc9</id>
<content type='text'>
This core was originally AArch64-only, but the r1p0 revision added
optional support for AArch32 at EL0.

TRM: https://developer.arm.com/documentation/101604/0103</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This core was originally AArch64-only, but the r1p0 revision added
optional support for AArch32 at EL0.

TRM: https://developer.arm.com/documentation/101604/0103</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm][ARM] Missing switch statement handles (#116086)</title>
<updated>2024-11-13T18:13:09+00:00</updated>
<author>
<name>Nashe Mncube</name>
<email>nashe.mncube@arm.com</email>
</author>
<published>2024-11-13T18:13:09+00:00</published>
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<id>57cf199be2f1496e242f6dcd32456b3ed816d46d</id>
<content type='text'>
PR #115153 added enums which needed to be handled in a switch statement.
This trips up buildbot.</content>
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<pre>
PR #115153 added enums which needed to be handled in a switch statement.
This trips up buildbot.</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] Optimise non-ABI frame pointers (#110286)</title>
<updated>2024-10-28T09:01:06+00:00</updated>
<author>
<name>Oliver Stannard</name>
<email>oliver.stannard@arm.com</email>
</author>
<published>2024-10-28T09:01:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=dff114b3565e4c981fcb40f24f72a0cb426294fe'/>
<id>dff114b3565e4c981fcb40f24f72a0cb426294fe</id>
<content type='text'>
With -fomit-frame-pointer, even if we set up a frame pointer for other
reasons (e.g. variable-sized or over-aligned stack allocations), we
don't need to create an ABI-compliant frame record. This means that we
can save all of the general-purpose registers in one push, instead of
splitting it to ensure that the frame pointer and link register are
adjacent on the stack, saving two instructions per function.</content>
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<pre>
With -fomit-frame-pointer, even if we set up a frame pointer for other
reasons (e.g. variable-sized or over-aligned stack allocations), we
don't need to create an ABI-compliant frame record. This means that we
can save all of the general-purpose registers in one push, instead of
splitting it to ensure that the frame pointer and link register are
adjacent on the stack, saving two instructions per function.</pre>
</div>
</content>
</entry>
<entry>
<title>Re-land: [ARM] Fix frame chains with M-profile PACBTI (#110285)</title>
<updated>2024-10-24T15:44:16+00:00</updated>
<author>
<name>Oliver Stannard</name>
<email>oliver.stannard@arm.com</email>
</author>
<published>2024-10-17T08:32:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=493529fbcee07b1ea17c3abfdea85cfa226a04a4'/>
<id>493529fbcee07b1ea17c3abfdea85cfa226a04a4</id>
<content type='text'>
When using AAPCS-compliant frame chains with PACBTI return address
signing, there ware a number of bugs in the generation of the frame
pointer and function prologues. The most obvious was that we sometimes
would modify r11 before pushing it to the stack, so it wasn't preserved
as required by the PCS. We also sometimes did not push R11 and LR
adjacent to one another on the stack, or used R11 as a frame pointer
without pointing it at the saved value of R11, both of which are
required to have an AAPCS compliant frame chain.

The original work of this patch was done by James Westwood, reviewed as
 #82801 and #81249, with some tidy-ups done by Mark Murray and myself.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When using AAPCS-compliant frame chains with PACBTI return address
signing, there ware a number of bugs in the generation of the frame
pointer and function prologues. The most obvious was that we sometimes
would modify r11 before pushing it to the stack, so it wasn't preserved
as required by the PCS. We also sometimes did not push R11 and LR
adjacent to one another on the stack, or used R11 as a frame pointer
without pointing it at the saved value of R11, both of which are
required to have an AAPCS compliant frame chain.

The original work of this patch was done by James Westwood, reviewed as
 #82801 and #81249, with some tidy-ups done by Mark Murray and myself.
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[ARM] Fix frame chains with M-profile PACBTI (#110285)"</title>
<updated>2024-10-18T08:04:28+00:00</updated>
<author>
<name>Oliver Stannard</name>
<email>oliver.stannard@arm.com</email>
</author>
<published>2024-10-18T08:03:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=18ac0178ad7f839bdb3376b7a0c6b69a24520a06'/>
<id>18ac0178ad7f839bdb3376b7a0c6b69a24520a06</id>
<content type='text'>
Reverting because this is causing failures with MSan:
https://lab.llvm.org/buildbot/#/builders/169/builds/4378

This reverts commit e1f8f84acec05997893c305c78fbf7feecf44dd7.
</content>
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<pre>
Reverting because this is causing failures with MSan:
https://lab.llvm.org/buildbot/#/builders/169/builds/4378

This reverts commit e1f8f84acec05997893c305c78fbf7feecf44dd7.
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] Fix frame chains with M-profile PACBTI (#110285)</title>
<updated>2024-10-17T08:32:44+00:00</updated>
<author>
<name>Oliver Stannard</name>
<email>oliver.stannard@arm.com</email>
</author>
<published>2024-10-17T08:32:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e1f8f84acec05997893c305c78fbf7feecf44dd7'/>
<id>e1f8f84acec05997893c305c78fbf7feecf44dd7</id>
<content type='text'>
When using AAPCS-compliant frame chains with PACBTI return address
signing, there ware a number of bugs in the generation of the frame
pointer and function prologues. The most obvious was that we sometimes
would modify r11 before pushing it to the stack, so it wasn't preserved
as required by the PCS. We also sometimes did not push R11 and LR
adjacent to one another on the stack, or used R11 as a frame pointer
without pointing it at the saved value of R11, both of which are
required to have an AAPCS compliant frame chain.

The original work of this patch was done by James Westwood, reviewed as
 #82801 and #81249, with some tidy-ups done by Mark Murray and myself.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When using AAPCS-compliant frame chains with PACBTI return address
signing, there ware a number of bugs in the generation of the frame
pointer and function prologues. The most obvious was that we sometimes
would modify r11 before pushing it to the stack, so it wasn't preserved
as required by the PCS. We also sometimes did not push R11 and LR
adjacent to one another on the stack, or used R11 as a frame pointer
without pointing it at the saved value of R11, both of which are
required to have an AAPCS compliant frame chain.

The original work of this patch was done by James Westwood, reviewed as
 #82801 and #81249, with some tidy-ups done by Mark Murray and myself.</pre>
</div>
</content>
</entry>
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