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<title>llvm-project.git/llvm/lib/Target/ARC/ARCOptAddrMode.cpp, branch users/koachan/spr/main.sparcias-enable-parseforallfeatures-in-matchoperandparserimpl</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)</title>
<updated>2024-06-11T13:27:14+00:00</updated>
<author>
<name>paperchalice</name>
<email>liujunchang97@outlook.com</email>
</author>
<published>2024-06-11T13:27:14+00:00</published>
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<id>837dc542b1519df343e5a8f7b2718483530a4193</id>
<content type='text'>
Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.</content>
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<pre>
Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.</pre>
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</content>
</entry>
<entry>
<title>[CodeGen] Make more use of MachineOperand::getOperandNo. NFC.</title>
<updated>2023-02-07T11:50:57+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2023-02-03T10:04:28+00:00</published>
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<id>a07584d57d7312d6bd5f266dc8cea915fb2b434b</id>
<content type='text'>
Differential Revision: https://reviews.llvm.org/D143252
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<pre>
Differential Revision: https://reviews.llvm.org/D143252
</pre>
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</entry>
<entry>
<title>[llvm] LLVM_FALLTHROUGH =&gt; [[fallthrough]]. NFC</title>
<updated>2022-08-08T18:24:15+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2022-08-08T18:24:15+00:00</published>
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<id>de9d80c1c579e39cc658a508f1d4ba1cd792e4d5</id>
<content type='text'>
With C++17 there is no Clang pedantic warning or MSVC C5051.
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With C++17 there is no Clang pedantic warning or MSVC C5051.
</pre>
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</content>
</entry>
<entry>
<title>[llvm] Remove unneeded cl::ZeroOrMore for cl::opt options. NFC</title>
<updated>2022-06-04T04:59:05+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2022-06-04T04:59:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=557efc9a8b68628c2c944678c6471dac30ed9e8e'/>
<id>557efc9a8b68628c2c944678c6471dac30ed9e8e</id>
<content type='text'>
Some cl::ZeroOrMore were added to avoid the `may only occur zero or one times!`
error. More were added due to cargo cult. Since the error has been removed,
cl::ZeroOrMore is unneeded.

Also remove cl::init(false) while touching the lines.
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<pre>
Some cl::ZeroOrMore were added to avoid the `may only occur zero or one times!`
error. More were added due to cargo cult. Since the error has been removed,
cl::ZeroOrMore is unneeded.

Also remove cl::init(false) while touching the lines.
</pre>
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</content>
</entry>
<entry>
<title>[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments</title>
<updated>2022-03-16T12:25:42+00:00</updated>
<author>
<name>Shengchen Kan</name>
<email>shengchen.kan@intel.com</email>
</author>
<published>2022-03-16T12:21:25+00:00</published>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[ARC] Fix `undefined symbol: llvm::MachineFunction::dump() const`</title>
<updated>2021-10-26T18:44:18+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2021-10-26T18:44:18+00:00</published>
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</entry>
<entry>
<title>[ARC] ARCRegisterInfo cleanup prior to adding core register pairs (ARC32) and 64-bit core registers (ARC64)</title>
<updated>2021-10-07T20:01:49+00:00</updated>
<author>
<name>Mark Schimmel</name>
<email>marksl@synopsys.com</email>
</author>
<published>2021-10-07T19:59:39+00:00</published>
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<id>417f8ea4baba9d577f5018ea211f50d3be21a54f</id>
<content type='text'>
Differential Revision: https://reviews.llvm.org/D11108
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<pre>
Differential Revision: https://reviews.llvm.org/D11108
</pre>
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</content>
</entry>
<entry>
<title>C] Add option to ARCOptAddrMode to disable the pass and diagnose errors</title>
<updated>2021-10-07T16:07:07+00:00</updated>
<author>
<name>Mark Schimmel</name>
<email>marksl@synopsys.com</email>
</author>
<published>2021-10-07T16:02:19+00:00</published>
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<id>20c074ee969d41aa4af84beaf91b3e19eb0ca639</id>
<content type='text'>
Fixed formatting issues reported by clang-format

Differential Revision: https://reviews.llvm.org/D111255
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<pre>
Fixed formatting issues reported by clang-format

Differential Revision: https://reviews.llvm.org/D111255
</pre>
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</content>
</entry>
<entry>
<title>Make more use of MachineInstr::mayLoadOrStore.</title>
<updated>2019-12-19T11:51:52+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2019-12-19T11:19:36+00:00</published>
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</entry>
<entry>
<title>[ARC] Add InitializePasses header to fix ARC build.</title>
<updated>2019-11-19T23:52:01+00:00</updated>
<author>
<name>Pete Couperus</name>
<email>petecoup@synopsys.com</email>
</author>
<published>2019-11-19T23:48:24+00:00</published>
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