llvm-project.git/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h, branch users/nico/python-2

[AMDGPU] Update pal metadata for v3.6 and fix v3.0 (#135196)

2025-04-28T12:31:14+00:00

Update entry_point for all pal versions below 3.6.
3.6 and above removes entry_point.

MCExpr-ify AMDGPU PALMetadata (#93236)

2024-06-13T12:59:31+00:00

Allows MCExprs as passed values to PALMetadata. Also adds related
`DelayedMCExpr` classes which serve as a pseudo-fixup to resolve MCExprs
as late as possible (i.e., right before emit through string or blob,
where they should be resolvable).

[AMDGPU] Avoid CodeGen dependencies from AMDGPU/Utils and MCTargetDesc

2023-07-27T22:19:24+00:00

This required two substantial changes:
1. Moving a `getRegBitWidth(TargetRegisterClass)` overload out of Utils
   and into CodeGen
2. Passing the string function name to AMDGPUPALMetadata instead of the
   MachineFunction

Other changes are minor or updates to accommodate the first two.

See issue #64166 for more information on the layering issue.

Differential Revision: https://reviews.llvm.org/D156486

[AMDGPU] Add backend support for new PAL ELF Metadata 3.0

2023-04-14T08:57:13+00:00

PAL Metadata 3.0 introduces an explicit structure in metadata for the
programmable registers written out by the compiler backend.
Rather than using opaque registers which can change between different
architectures and requires encoding the bitfield information in the backend,
which may change between versions.

This is the initial minimal implementation that enables the use of PAL Metadata
3.0.

The change itself should be NFC for non-PAL, although the way RSRC2 register is
handled has been changed slightly.

The test is fairly minimal, but checks that the metadata format looks as
expected and verifies a couple of special cases such as tgid_[xyz]_en handling
and PsInputAddr/Ena which also change to explicit fields.

Differential Revision: https://reviews.llvm.org/D147143

[AMDGPU] Add agpr_count to metadata and AsmParser

2022-02-16T23:17:23+00:00

gfx90a allows the number of ACC registers (AGPRs) to be set
independently to the VGPR registers. For both HSA and PAL metadata, we
now include an "agpr_count" key to report the number of AGPRs set for
supported devices (gfx90a, gfx908, as determined by hasMAIInsts()).
This is collected from SIProgramInfo.NumAccVGPR for both HSA and PAL.
The AsmParser also now recognizes ".kernel.agpr_count" for supported
devices.

Differential Revision: https://reviews.llvm.org/D116140

[AMDGPU] Set optional PAL metadata

2021-07-06T09:58:00+00:00

Set informational fields in the .shader_functions table.

Also correct the documentation, .scratch_memory_size and .lds_size are
integers.

Differential Revision: https://reviews.llvm.org/D105116

AMDGPU: Add target id and code object v4 support

2021-03-24T15:54:05+00:00

  - Add target id support (https://clang.llvm.org/docs/ClangOffloadBundler.html#target-id)
  - Add code object v4 support (https://llvm.org/docs/AMDGPUUsage.html#elf-code-object)
    - Add kernarg_size to kernel descriptor
    - Change trap handler ABI to no longer move queue pointer into s[0:1]
  - Cleanup ELF definitions
    - Add V2, V3, V4 suffixes to make a clear distinction for code object version
    - Consolidate note names

Differential Revision: https://reviews.llvm.org/D95638

[NFC][AMDGPU] Reduce include files dependency.

2021-01-07T19:22:05+00:00

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D93813

[AMDGPU] Mark amdgpu_gfx functions as module entry function

2020-12-14T09:43:39+00:00

- Allows lds allocations
- Writes resource usage into COMPUTE_PGM_RSRC1 registers in PAL metadata

Differential Revision: https://reviews.llvm.org/D92946

[AMDGPU] Emit stack frame size in metadata

2020-11-25T15:30:02+00:00

Add .shader_functions to pal metadata, which contains the stack frame
size for all non-entry-point functions.

Differential Revision: https://reviews.llvm.org/D90036