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<title>llvm-project.git/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp, branch users/nico/python-2</title>
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<title>[AMDGPU][NPM] Port SIPreEmitPeephole to NPM (#130065)</title>
<updated>2025-04-08T12:28:48+00:00</updated>
<author>
<name>Akshat Oke</name>
<email>Akshat.Oke@amd.com</email>
</author>
<published>2025-04-08T12:28:48+00:00</published>
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<entry>
<title>[AMDGPU][SIPreEmitPeephole] Fix mustRetainExeczBranch (#120121)</title>
<updated>2024-12-17T10:47:38+00:00</updated>
<author>
<name>Mirko Brkušanin</name>
<email>Mirko.Brkusanin@amd.com</email>
</author>
<published>2024-12-17T10:47:38+00:00</published>
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Do not remove S_CBRANCH_EXECZ if one of the following blocks contains an
unconditional branch to a block other than the one immediately following
it. This can cause unwanted behavior like infinite loops.</content>
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Do not remove S_CBRANCH_EXECZ if one of the following blocks contains an
unconditional branch to a block other than the one immediately following
it. This can cause unwanted behavior like infinite loops.</pre>
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</entry>
<entry>
<title>[AMDGPU] Fix -Wunused-variable in non-assertion builds after #109818</title>
<updated>2024-10-11T15:52:11+00:00</updated>
<author>
<name>Fangrui Song</name>
<email>i@maskray.me</email>
</author>
<published>2024-10-11T15:52:11+00:00</published>
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<entry>
<title>[AMDGPU][SIPreEmitPeephole] mustRetainExeczBranch: use BranchProbability and TargetSchedmodel (#109818)</title>
<updated>2024-10-11T15:45:59+00:00</updated>
<author>
<name>Juan Manuel Martinez Caamaño</name>
<email>jmartinezcaamao@gmail.com</email>
</author>
<published>2024-10-11T15:45:59+00:00</published>
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Remove s_cbranch_execnz branches if the transformation is
profitable according to `BranchProbability` and `TargetSchedmodel`.</content>
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Remove s_cbranch_execnz branches if the transformation is
profitable according to `BranchProbability` and `TargetSchedmodel`.</pre>
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<entry>
<title>[AMDGPU] Update EXECZ retention in SIPreEmitPeephole for GFX10/12 (#97676)</title>
<updated>2024-07-09T05:44:31+00:00</updated>
<author>
<name>Carl Ritson</name>
<email>carl.ritson@amd.com</email>
</author>
<published>2024-07-09T05:44:31+00:00</published>
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The check to maintain EXECZ branches only checks S_WAITCNT.
Add handling for new waitcnt instructions in GFX10 and GFX12.</content>
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The check to maintain EXECZ branches only checks S_WAITCNT.
Add handling for new waitcnt instructions in GFX10 and GFX12.</pre>
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<entry>
<title>[CodeGen] Make the parameter TRI required in some functions. (#85968)</title>
<updated>2024-04-24T13:24:14+00:00</updated>
<author>
<name>Xu Zhang</name>
<email>simonzgx@gmail.com</email>
</author>
<published>2024-04-24T13:24:14+00:00</published>
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Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.</content>
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Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.</pre>
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<entry>
<title>[AMDGPU] Use MachineBasicBlock::instrs (NFC)</title>
<updated>2024-01-28T18:47:07+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-01-28T18:47:06+00:00</published>
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<entry>
<title>AMDGPU: Fix counting debug instructions in execz skip threshold</title>
<updated>2023-08-02T12:09:41+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2023-06-21T22:43:33+00:00</published>
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<entry>
<title>[Target] Qualify auto in range-based for loops (NFC)</title>
<updated>2022-08-28T17:41:50+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-08-28T17:41:50+00:00</published>
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<entry>
<title>[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments</title>
<updated>2022-03-16T12:25:42+00:00</updated>
<author>
<name>Shengchen Kan</name>
<email>shengchen.kan@intel.com</email>
</author>
<published>2022-03-16T12:21:25+00:00</published>
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