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<title>llvm-project.git/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>AMDGPU: VIMAGE/VSAMPLE are bundle candidates (#140854)</title>
<updated>2025-05-28T00:47:05+00:00</updated>
<author>
<name>Ruiling, Song</name>
<email>ruiling.song@amd.com</email>
</author>
<published>2025-05-28T00:47:05+00:00</published>
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<entry>
<title>[AMDGPU][NewPM] Port SIPostRABundler to NPM (#123717)</title>
<updated>2025-02-21T10:35:58+00:00</updated>
<author>
<name>Akshat Oke</name>
<email>Akshat.Oke@amd.com</email>
</author>
<published>2025-02-21T10:35:58+00:00</published>
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<entry>
<title>[MC] Add MCRegisterInfo::regunits for iteration over register units</title>
<updated>2023-06-16T02:39:50+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2023-05-21T01:28:33+00:00</published>
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Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D152098
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Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D152098
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</entry>
<entry>
<title>[AMDGPU] Use llvm::any_of (NFC)</title>
<updated>2022-10-16T16:19:09+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-10-16T16:19:09+00:00</published>
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</entry>
<entry>
<title>[AMDGPU] Add iglp_opt builtin and MFMA GEMM Opt strategy</title>
<updated>2022-08-19T22:38:36+00:00</updated>
<author>
<name>Austin Kerbow</name>
<email>Austin.Kerbow@amd.com</email>
</author>
<published>2022-08-17T17:00:06+00:00</published>
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<id>b0f4678b9058a4ae00200dfb1de0da5f2ea84dcb</id>
<content type='text'>
Adds a builtin that serves as an optimization hint to apply specific optimized
DAG mutations during scheduling. This also disables any other mutations or
clustering that may interfere with the desired pipeline. The first optimization
strategy that is added here is designed to improve the performance of small gemm
kernels on gfx90a.

Reviewed By: jrbyrnes

Differential Revision: https://reviews.llvm.org/D132079
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Adds a builtin that serves as an optimization hint to apply specific optimized
DAG mutations during scheduling. This also disables any other mutations or
clustering that may interfere with the desired pipeline. The first optimization
strategy that is added here is designed to improve the performance of small gemm
kernels on gfx90a.

Reviewed By: jrbyrnes

Differential Revision: https://reviews.llvm.org/D132079
</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Fix SIPostRABundler crash on null register used by dbg value</title>
<updated>2021-11-19T01:01:19+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2021-11-18T23:35:54+00:00</published>
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<id>f8e615462b4f1376674530cc55ab6b8993cec726</id>
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Recently we started generate DBG_VALUEs with $noreg operands.
This crashes SIPostRABundler, and it should not iterate these
registers anyway.

Fixes: SWDEV-311733

Differential Revision: https://reviews.llvm.org/D114202
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<pre>
Recently we started generate DBG_VALUEs with $noreg operands.
This crashes SIPostRABundler, and it should not iterate these
registers anyway.

Fixes: SWDEV-311733

Differential Revision: https://reviews.llvm.org/D114202
</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU][NFC] Fix typos</title>
<updated>2021-11-12T10:37:21+00:00</updated>
<author>
<name>Neubauer, Sebastian</name>
<email>Sebastian.Neubauer@amd.com</email>
</author>
<published>2021-11-11T14:58:42+00:00</published>
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<content type='text'>
Differential Revision: https://reviews.llvm.org/D113672
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Differential Revision: https://reviews.llvm.org/D113672
</pre>
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</entry>
<entry>
<title>AMDGPU: Use kill instruction to hint soft clause live ranges</title>
<updated>2021-02-26T23:26:40+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2021-02-12T22:47:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=81b2c23b77716e1074f3e84259321cb9b8c9b2eb'/>
<id>81b2c23b77716e1074f3e84259321cb9b8c9b2eb</id>
<content type='text'>
Previously we would use a bundle to hint the register allocator to not
overwrite the pointers in a sequence of loads to avoid breaking soft
clauses. This bundling was based on a fuzzy register pressure
heuristic, so we could not guarantee using more registers than are
really available. This would result in register allocator failing on
unsatisfiable bundles. Use a kill to artificially extend the live
ranges, so we can always succeed at register allocation even if it
means extra spills in the worst case.

This seems to capture most of the benefit of the bundle while avoiding
most of the risk presented by the bundle. However the lit tests do
show a handful of regressions. In some cases with sequences of
volatile loads, unused load components end up getting reallocated to
the next load which forces a wait between. There are also a few small
scheduling regressions where a hazard used to be avoided, and one
spill torture test which for some reason nearly doubles the stack
usage. There is also a bit of noise from leftover kills (it may make
sense for post-RA pseudos to strip all of these out).
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<pre>
Previously we would use a bundle to hint the register allocator to not
overwrite the pointers in a sequence of loads to avoid breaking soft
clauses. This bundling was based on a fuzzy register pressure
heuristic, so we could not guarantee using more registers than are
really available. This would result in register allocator failing on
unsatisfiable bundles. Use a kill to artificially extend the live
ranges, so we can always succeed at register allocation even if it
means extra spills in the worst case.

This seems to capture most of the benefit of the bundle while avoiding
most of the risk presented by the bundle. However the lit tests do
show a handful of regressions. In some cases with sequences of
volatile loads, unused load components end up getting reallocated to
the next load which forces a wait between. There are also a few small
scheduling regressions where a hazard used to be avoided, and one
spill torture test which for some reason nearly doubles the stack
usage. There is also a bit of noise from leftover kills (it may make
sense for post-RA pseudos to strip all of these out).
</pre>
</div>
</content>
</entry>
<entry>
<title>AMDGPU: Remove kills following clusters of memory instruction</title>
<updated>2021-02-16T15:49:28+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2021-02-14T14:54:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a7455d7b7ce33bb4d04106e26f242e6cb24f3042'/>
<id>a7455d7b7ce33bb4d04106e26f242e6cb24f3042</id>
<content type='text'>
In a future commit, soft clauses will be hinted with kill instructions
rather than forced together with bundles. Look for kills that look
like this, and erase them. I'm not sure if the check for specific uses
is worthwhile, or if it would be better to just unconditionally erase
kills.

This reduces test churn in a future patch.
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In a future commit, soft clauses will be hinted with kill instructions
rather than forced together with bundles. Look for kills that look
like this, and erase them. I'm not sure if the check for specific uses
is worthwhile, or if it would be better to just unconditionally erase
kills.

This reduces test churn in a future patch.
</pre>
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</content>
</entry>
<entry>
<title>AMDGPU: Fix debug info handling in post-RA bundler</title>
<updated>2021-02-16T15:42:06+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2021-02-14T15:46:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c320e8196ae67a4eaa72253ed9013dda28eaf390'/>
<id>c320e8196ae67a4eaa72253ed9013dda28eaf390</id>
<content type='text'>
This was allowing debug instructions to break the bundling, which
would change scheduling behavior. Bundle debug info / kills inside
the bundle. This seems to work OK, although the asm printer doesn't
understand these in a bundle. This implicitly expects the memory
legalizer to unbundle. It would probably be slightly nicer to move
these after.

Rewrite the loop to be clearer and make sure we don't end a bundle on
a meta instruction, only allow them in between other valid bundle
instructions.
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<pre>
This was allowing debug instructions to break the bundling, which
would change scheduling behavior. Bundle debug info / kills inside
the bundle. This seems to work OK, although the asm printer doesn't
understand these in a bundle. This implicitly expects the memory
legalizer to unbundle. It would probably be slightly nicer to move
these after.

Rewrite the loop to be clearer and make sure we don't end a bundle on
a meta instruction, only allow them in between other valid bundle
instructions.
</pre>
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