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<title>llvm-project.git/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[AMDGPU] Rename SIInsertSkips Pass</title>
<updated>2021-03-20T02:48:04+00:00</updated>
<author>
<name>Carl Ritson</name>
<email>carl.ritson@amd.com</email>
</author>
<published>2021-03-20T02:27:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=fe5f4c397f029b66a541b25d4749496785f2d4f5'/>
<id>fe5f4c397f029b66a541b25d4749496785f2d4f5</id>
<content type='text'>
Pass no longer handles skips.  Pass now removes unnecessary
unconditional branches and lowers early termination branches.
Hence rename to SILateBranchLowering.

Move code to handle returns to epilog from SIPreEmitPeephole
into SILateBranchLowering. This means SIPreEmitPeephole only
contains optional optimisations, and all required transforms
are in SILateBranchLowering.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D98915
</content>
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<pre>
Pass no longer handles skips.  Pass now removes unnecessary
unconditional branches and lowers early termination branches.
Hence rename to SILateBranchLowering.

Move code to handle returns to epilog from SIPreEmitPeephole
into SILateBranchLowering. This means SIPreEmitPeephole only
contains optional optimisations, and all required transforms
are in SILateBranchLowering.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D98915
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Remove unused function opcodeEmitsNoInsts()</title>
<updated>2021-03-09T02:48:30+00:00</updated>
<author>
<name>Ruiling Song</name>
<email>ruiling.song@amd.com</email>
</author>
<published>2021-03-09T02:11:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=67a05f4e09f08685b2898c6aa3597b06c57fa6ea'/>
<id>67a05f4e09f08685b2898c6aa3597b06c57fa6ea</id>
<content type='text'>
This was missed in the patch D97545, and cause buildbot failure.

Reviewed by: critson

Differential Revision: https://reviews.llvm.org/D98229
</content>
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<pre>
This was missed in the patch D97545, and cause buildbot failure.

Reviewed by: critson

Differential Revision: https://reviews.llvm.org/D98229
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Remove SI_MASK_BRANCH</title>
<updated>2021-03-09T01:13:23+00:00</updated>
<author>
<name>Ruiling Song</name>
<email>ruiling.song@amd.com</email>
</author>
<published>2021-02-25T01:19:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f0ccdde3c9ab23f997a4a30a0e9ab7d9435ec1c6'/>
<id>f0ccdde3c9ab23f997a4a30a0e9ab7d9435ec1c6</id>
<content type='text'>
This is already deprecated, so remove code working on this.
Also update the tests by using S_CBRANCH_EXECZ instead of SI_MASK_BRANCH.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D97545
</content>
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<pre>
This is already deprecated, so remove code working on this.
Also update the tests by using S_CBRANCH_EXECZ instead of SI_MASK_BRANCH.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D97545
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Move kill lowering to WQM pass and add live mask tracking</title>
<updated>2021-02-11T11:31:29+00:00</updated>
<author>
<name>Carl Ritson</name>
<email>carl.ritson@amd.com</email>
</author>
<published>2021-02-10T03:56:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c16f776028ddd39a4d5ea39d5c3831b1bcbb8c02'/>
<id>c16f776028ddd39a4d5ea39d5c3831b1bcbb8c02</id>
<content type='text'>
Move implementation of kill intrinsics to WQM pass. Add live lane
tracking by updating a stored exec mask when lanes are killed.
Use live lane tracking to enable early termination of shader
at any point in control flow.

Reviewed By: piotr

Differential Revision: https://reviews.llvm.org/D94746
</content>
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<pre>
Move implementation of kill intrinsics to WQM pass. Add live lane
tracking by updating a stored exec mask when lanes are killed.
Use live lane tracking to enable early termination of shader
at any point in control flow.

Reviewed By: piotr

Differential Revision: https://reviews.llvm.org/D94746
</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets</title>
<updated>2021-01-20T19:22:45+00:00</updated>
<author>
<name>dfukalov</name>
<email>daniil.fukalov@amd.com</email>
</author>
<published>2021-01-20T12:48:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=560d7e04113bf43ed0928a1fbdf328818194141e'/>
<id>560d7e04113bf43ed0928a1fbdf328818194141e</id>
<content type='text'>
... to reduce headers dependency.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D95036
</content>
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<pre>
... to reduce headers dependency.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D95036
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Add SI_EARLY_TERMINATE_SCC0 for early terminating shader</title>
<updated>2021-01-13T04:29:05+00:00</updated>
<author>
<name>Carl Ritson</name>
<email>carl.ritson@amd.com</email>
</author>
<published>2021-01-13T04:08:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=790c75c16373d37846c8433a69efd9b0d5e4ad12'/>
<id>790c75c16373d37846c8433a69efd9b0d5e4ad12</id>
<content type='text'>
Add pseudo instruction to allow early termination of pixel shader
anywhere based on the value of SCC.  The intention is to use this
when a mask of live lanes is updated, e.g. live lanes in WQM pass.
This facilitates early termination of shaders even when EXEC is
incomplete, e.g. in non-uniform control flow.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D88777
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add pseudo instruction to allow early termination of pixel shader
anywhere based on the value of SCC.  The intention is to use this
when a mask of live lanes is updated, e.g. live lanes in WQM pass.
This facilitates early termination of shaders even when EXEC is
incomplete, e.g. in non-uniform control flow.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D88777
</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][AMDGPU] Reduce include files dependency.</title>
<updated>2021-01-07T19:22:05+00:00</updated>
<author>
<name>dfukalov</name>
<email>daniil.fukalov@amd.com</email>
</author>
<published>2020-12-25T15:52:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6a87e9b08bf093ba3ccba8650b89f4d337c497f4'/>
<id>6a87e9b08bf093ba3ccba8650b89f4d337c497f4</id>
<content type='text'>
Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D93813
</content>
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<pre>
Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D93813
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Use llvm::is_contained (NFC)</title>
<updated>2020-12-05T05:42:55+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2020-12-05T05:42:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=2dc4a14e4d5fee5acb2ae43866ce03c028509257'/>
<id>2dc4a14e4d5fee5acb2ae43866ce03c028509257</id>
<content type='text'>
</content>
<content type='xhtml'>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Define and use names for export targets. NFC.</title>
<updated>2020-11-12T19:57:14+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2020-11-11T19:21:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=d7d6ac562477f71879bc72ea11bc0861b41382a0'/>
<id>d7d6ac562477f71879bc72ea11bc0861b41382a0</id>
<content type='text'>
Differential Revision: https://reviews.llvm.org/D91289
</content>
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<pre>
Differential Revision: https://reviews.llvm.org/D91289
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] SIInsertSkips: Refactor early exit block creation</title>
<updated>2020-10-06T00:44:55+00:00</updated>
<author>
<name>Carl Ritson</name>
<email>carl.ritson@amd.com</email>
</author>
<published>2020-10-06T00:44:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c3e07a0018ec74216d662e0596584d2c846a1063'/>
<id>c3e07a0018ec74216d662e0596584d2c846a1063</id>
<content type='text'>
Refactor exit block creation to a single call ensureEarlyExitBlock.
Add support for generating an early exit block which clears the
exec mask, but only add this instruction when required.
These changes are to facilitate adding more forms of early
termination for PS shaders in the near future.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D88775
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Refactor exit block creation to a single call ensureEarlyExitBlock.
Add support for generating an early exit block which clears the
exec mask, but only add this instruction when required.
These changes are to facilitate adding more forms of early
termination for PS shaders in the near future.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D88775
</pre>
</div>
</content>
</entry>
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