llvm-project.git/llvm/lib/Target/AMDGPU/R600Packetizer.cpp, branch users/nico/python-2 Unnamed repository; edit this file 'description' to name the repository. [TableGen] Emit OpName as an enum class instead of a namespace (#125313) 2025-02-12T16:19:30+00:00 Rahul Joshi rjoshi@nvidia.com 2025-02-12T16:19:30+00:00 bee9664970d51df3f4e1d298d1bcb95bba364e17 - Change InstrInfoEmitter to emit OpName as an enum class instead of an anonymous enum in the OpName namespace. - This will help clearly distinguish between values that are OpNames vs just operand indices and should help avoid bugs due to confusion between the two. - Rename OpName::OPERAND_LAST to NUM_OPERAND_NAMES. - Emit declaration of getOperandIdx() along with the OpName enum so it doesn't have to be repeated in various headers. - Also updated AMDGPU, RISCV, and WebAssembly backends to conform to the new definition of OpName (mostly mechanical changes). 
- Change InstrInfoEmitter to emit OpName as an enum class
  instead of an anonymous enum in the OpName namespace.
- This will help clearly distinguish between values that are 
  OpNames vs just operand indices and should help avoid
  bugs due to confusion between the two.
- Rename OpName::OPERAND_LAST to NUM_OPERAND_NAMES.
- Emit declaration of getOperandIdx() along with the OpName
  enum so it doesn't have to be repeated in various headers.
- Also updated AMDGPU, RISCV, and WebAssembly backends
  to conform to the new definition of OpName (mostly
  mechanical changes).
 [Target] Use range-based for loops (NFC) (#98705) 2024-07-14T00:40:51+00:00 Kazu Hirata kazu@google.com 2024-07-14T00:40:51+00:00 5e22a536981483d8411266dccee2ff3e5f31f4a1 






[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)
2024-07-09T01:11:18+00:00

paperchalice
liujunchang97@outlook.com

2024-07-09T01:11:18+00:00

79d0de2ac37b6b7d66720611935d1dd7fc4fbd43

- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.




- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.






[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)
2024-06-11T13:27:14+00:00

paperchalice
liujunchang97@outlook.com

2024-06-11T13:27:14+00:00

837dc542b1519df343e5a8f7b2718483530a4193

Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.




Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.






[AMDGPU][NFC] Fix typos
2022-02-18T14:05:21+00:00

Sebastian Neubauer
Sebastian.Neubauer@amd.com

2022-02-18T13:57:21+00:00

6527b2a4d5fadd0743e13797968c49ec30112dfe

Fix some typos in the amdgpu backend.

Differential Revision: https://reviews.llvm.org/D119235





Fix some typos in the amdgpu backend.

Differential Revision: https://reviews.llvm.org/D119235







[llvm] Use range-based for loops (NFC)
2021-12-12T06:34:07+00:00

Kazu Hirata
kazu@google.com

2021-12-12T06:34:07+00:00

67aeae0138ff1eac07165f247e39a3bdaa5b17a4












[llvm] Use make_early_inc_range (NFC)
2021-11-22T03:24:17+00:00

Kazu Hirata
kazu@google.com

2021-11-22T03:24:17+00:00

49e3838145dff1ec91c2e67a2cb562775c8d2a08












[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25T09:01:55+00:00

Daniil Fukalov
daniil.fukalov@amd.com

2021-08-23T20:50:19+00:00

48958d02d294a3c98bb90bb49dbab614ae4602ac

1. Splitted out some parts of R600 target to separate modules/headers.
2. Reduced some include lists in headers.
3. Found and fixed issue with override `GCNTargetMachine::getSubtargetImpl()`
   and `R600TargetMachine::getSubtargetImpl()` had different return value type
   than base class.
4. Minor forward declarations cleanup.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D108596





1. Splitted out some parts of R600 target to separate modules/headers.
2. Reduced some include lists in headers.
3. Found and fixed issue with override `GCNTargetMachine::getSubtargetImpl()`
   and `R600TargetMachine::getSubtargetImpl()` had different return value type
   than base class.
4. Minor forward declarations cleanup.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D108596







[NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets
2021-01-20T19:22:45+00:00

dfukalov
daniil.fukalov@amd.com

2021-01-20T12:48:02+00:00

560d7e04113bf43ed0928a1fbdf328818194141e

... to reduce headers dependency.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D95036





... to reduce headers dependency.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D95036







[NFC][AMDGPU] Reduce include files dependency.
2021-01-07T19:22:05+00:00

dfukalov
daniil.fukalov@amd.com

2020-12-25T15:52:14+00:00

6a87e9b08bf093ba3ccba8650b89f4d337c497f4

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D93813





Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D93813