llvm-project.git/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp, branch users/nico/python-2 Unnamed repository; edit this file 'description' to name the repository. [AMDGPU] Initial support for gfx1250 target. (#144965) 2025-06-20T05:52:51+00:00 Stanislav Mekhanoshin rampitec@users.noreply.github.com 2025-06-20T05:52:51+00:00 69974658f079cec82a9fc13dd4993ab1e072c811 This is just a stub for now. 
This is just a stub for now.
 AMDGPU: Replace deprecated MCExpr::print with MCAsmInfo::printExpr 2025-06-16T00:11:20+00:00 Fangrui Song i@maskray.me 2025-06-16T00:11:20+00:00 95acd6199f3799da00e45b62fd1045ece7142cad 






Move relocation specifiers to AMDGPUMCExpr::Specifier
2025-03-30T19:12:38+00:00

Fangrui Song
i@maskray.me

2025-03-30T19:12:38+00:00

5a3d4036cff159e32aa4ab1b11fd6a25a50a456c

Similar to previous migration done for all other ELF targets.
Switch from the confusing `VariantKind` to `Specifier`, which aligns
with Arm and IBM AIX's documentation.

Moving forward, relocation specifiers should be integrated into
AMDGPUMCExpr rather than MCSymbolRefExpr::SubclassData.

(Note: the term AMDGPUMCExpr::VariantKind is for expressions
without relocation specifiers:
https://github.com/llvm/llvm-project/pull/82022

It's up to AMDGPU maintainers to integrate these constants into Specifier.
)

Pull Request: https://github.com/llvm/llvm-project/pull/133608





Similar to previous migration done for all other ELF targets.
Switch from the confusing `VariantKind` to `Specifier`, which aligns
with Arm and IBM AIX's documentation.

Moving forward, relocation specifiers should be integrated into
AMDGPUMCExpr rather than MCSymbolRefExpr::SubclassData.

(Note: the term AMDGPUMCExpr::VariantKind is for expressions
without relocation specifiers:
https://github.com/llvm/llvm-project/pull/82022

It's up to AMDGPU maintainers to integrate these constants into Specifier.
)

Pull Request: https://github.com/llvm/llvm-project/pull/133608







[NFC][AMDGPU] Replace direct arch comparison with `isAMDGCN()` (#131357)
2025-03-14T18:21:44+00:00

Shilei Tian
i@tianshilei.me

2025-03-14T18:21:44+00:00

51c706c11955bc1de57ca98b21cf8c7dd7b39aa9












[MC] Remove unneeded VK_None argument from MCSymbolRefExpr::create. NFC
2025-03-06T08:00:05+00:00

Fangrui Song
i@maskray.me

2025-03-06T08:00:05+00:00

687854aea8fdb20525af749069cf19bf612eaf2b












[AMDGPU] Replace gfx940 and gfx941 with gfx942 in llvm (#126763)
2025-02-19T09:20:48+00:00

Fabian Ritter
fabian.ritter@amd.com

2025-02-19T09:20:48+00:00

8615f9aaffd4337a33ea979f010c4d6410ba6125

gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

This PR removes all non-documentation occurrences of gfx940/gfx941 from
the llvm directory, and the remaining occurrences in clang.

Documentation changes will follow.

For SWDEV-512631




gfx940 and gfx941 are no longer supported. This is one of a series of
PRs to remove them from the code base.

This PR removes all non-documentation occurrences of gfx940/gfx941 from
the llvm directory, and the remaining occurrences in clang.

Documentation changes will follow.

For SWDEV-512631






[AMDGPU] Create new directive .amdhsa_inst_pref_size (#126622)
2025-02-11T16:35:45+00:00

Stanislav Mekhanoshin
rampitec@users.noreply.github.com

2025-02-11T16:35:45+00:00

76392421553f3b25552970812868f70721971451

The field INST_PREF_SIZE is available since gfx11.




The field INST_PREF_SIZE is available since gfx11.






[AMDGPU] Add backward compatibility layer for kernarg preloading (#119167)
2025-01-10T19:39:02+00:00

Austin Kerbow
Austin.Kerbow@amd.com

2025-01-10T19:39:02+00:00

2e5c2982819625d84e0b61aea0ec00de859f0e95

Add a prologue to the kernel entry to handle cases where code designed
for kernarg preloading is executed on hardware equipped with
incompatible firmware. If hardware has compatible firmware the 256 bytes
at the start of the kernel entry will be skipped. This skipping is done
automatically by hardware that supports the feature.

A pass is added which is intended to be run at the very end of the
pipeline to avoid any optimizations that would assume the prologue is a
real predecessor block to the actual code start. In reality we have two
possible entry points for the function. 1. The optimized path that
supports kernarg preloading which begins at an offset of 256 bytes. 2.
The backwards compatible entry point which starts at offset 0.




Add a prologue to the kernel entry to handle cases where code designed
for kernarg preloading is executed on hardware equipped with
incompatible firmware. If hardware has compatible firmware the 256 bytes
at the start of the kernel entry will be skipped. This skipping is done
automatically by hardware that supports the feature.

A pass is added which is intended to be run at the very end of the
pipeline to avoid any optimizations that would assume the prologue is a
real predecessor block to the actual code start. In reality we have two
possible entry points for the function. 1. The optimized path that
supports kernarg preloading which begins at an offset of 256 bytes. 2.
The backwards compatible entry point which starts at offset 0.






AMDGPU: Add gfx950 subtarget definitions (#116307)
2024-11-18T18:41:14+00:00

Matt Arsenault
Matthew.Arsenault@amd.com

2024-11-18T18:41:14+00:00

a6fc489bb7a2e9fb3a7f70cccc181e4ee70374bf

Mostly a stub, but adds some baseline tests and
tests for removed instructions.




Mostly a stub, but adds some baseline tests and
tests for removed instructions.






[AMDGPU] Remove unused includes (NFC) (#116154)
2024-11-14T05:10:03+00:00

Kazu Hirata
kazu@google.com

2024-11-14T05:10:03+00:00

be187369a03bf2df8bdbc76ecd381377b3bb6074

Identified with misc-include-cleaner.




Identified with misc-include-cleaner.