<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm-project.git/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp, branch users/ojhunt/ptrauth-additions</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[AMDGPU][MC] Do not inline lit()/lit64() operands. (#162137)</title>
<updated>2025-10-08T11:43:42+00:00</updated>
<author>
<name>Ivan Kosarev</name>
<email>ivan.kosarev@amd.com</email>
</author>
<published>2025-10-08T11:43:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3d4da1ee816f53a48e2b645c17069a80fabfb07b'/>
<id>3d4da1ee816f53a48e2b645c17069a80fabfb07b</id>
<content type='text'>
For now treat the modifiers synonymous to each other.

The disassembler side is to be addressed separately.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For now treat the modifiers synonymous to each other.

The disassembler side is to be addressed separately.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][MC] Avoid creating lit64() operands unless asked or needed. (#161191)</title>
<updated>2025-10-08T09:51:55+00:00</updated>
<author>
<name>Ivan Kosarev</name>
<email>ivan.kosarev@amd.com</email>
</author>
<published>2025-10-08T09:51:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=20f41ed8c195eff6199dc77bdd20f7226cfdae0f'/>
<id>20f41ed8c195eff6199dc77bdd20f7226cfdae0f</id>
<content type='text'>
There should normally be no need to generate implicit lit64()
modifiers on the assembler side. It's the encoder's responsibility
to recognise literals that are implicitly 64 bits wide.

The exceptions are where we rewrite floating-point operand values
as integer ones, which would not be assembled back to the original
values unless wrapped into lit64().

Respect explicit lit() modifiers for non-inline values as
necessary to avoid regressions in MC tests. This change still
doesn't prevent use of inline constants where lit()/lit64 is
specified; subject to a separate patch.

On disassembling, only create lit64() operands where necessary for
correct round-tripping.

Add round-tripping tests where useful and feasible.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There should normally be no need to generate implicit lit64()
modifiers on the assembler side. It's the encoder's responsibility
to recognise literals that are implicitly 64 bits wide.

The exceptions are where we rewrite floating-point operand values
as integer ones, which would not be assembled back to the original
values unless wrapped into lit64().

Respect explicit lit() modifiers for non-inline values as
necessary to avoid regressions in MC tests. This change still
doesn't prevent use of inline constants where lit()/lit64 is
specified; subject to a separate patch.

On disassembling, only create lit64() operands where necessary for
correct round-tripping.

Add round-tripping tests where useful and feasible.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][AsmParser] Introduce MC representation for lit() and lit64(). (#160316)</title>
<updated>2025-09-24T11:35:50+00:00</updated>
<author>
<name>Ivan Kosarev</name>
<email>ivan.kosarev@amd.com</email>
</author>
<published>2025-09-24T11:35:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9e55d81c682a3649858320e942a3fe2ba3d5fff2'/>
<id>9e55d81c682a3649858320e942a3fe2ba3d5fff2</id>
<content type='text'>
And rework the lit64() support to use it.

The rules for when to add lit64() can be simplified and
improved. In this change, however, we just follow the existing
conventions on the assembler and disassembler sides.

In codegen we do not (and normally should not need to) add explicit
lit() and lit64() modifiers, so the codegen tests lose them. The change
is an NFCI otherwise.

Simplifies printing operands.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
And rework the lit64() support to use it.

The rules for when to add lit64() can be simplified and
improved. In this change, however, we just follow the existing
conventions on the assembler and disassembler sides.

In codegen we do not (and normally should not need to) add explicit
lit() and lit64() modifiers, so the codegen tests lose them. The change
is an NFCI otherwise.

Simplifies printing operands.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][MC] Keep MCOperands unencoded. (#158685)</title>
<updated>2025-09-16T08:01:01+00:00</updated>
<author>
<name>Ivan Kosarev</name>
<email>ivan.kosarev@amd.com</email>
</author>
<published>2025-09-16T08:01:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7ba702195136b448d6f35ae3ea4075059cb0df82'/>
<id>7ba702195136b448d6f35ae3ea4075059cb0df82</id>
<content type='text'>
We have proper encoding facilities to encode operands and instructions;
there's no need to pollute the MC representation with encoding details.

Supposed to be an NFCI, but happens to fix some re-encoded instruction
codes in disassembler tests.

The 64-bit operands are to be addressed in following patches introducing
MC-level representation for lit() and lit64() modifiers, to then be
respected by both the assembler and disassembler.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We have proper encoding facilities to encode operands and instructions;
there's no need to pollute the MC representation with encoding details.

Supposed to be an NFCI, but happens to fix some re-encoded instruction
codes in disassembler tests.

The 64-bit operands are to be addressed in following patches introducing
MC-level representation for lit() and lit64() modifiers, to then be
respected by both the assembler and disassembler.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Do not use 64-bit literals with VOP3* encodings (#156602)</title>
<updated>2025-09-04T09:00:21+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-09-04T09:00:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=88effbff10449b79226743933bd3eae00228f626'/>
<id>88effbff10449b79226743933bd3eae00228f626</id>
<content type='text'>
Encoding sometimes uses a 64-bit instead of 32-bit literal because it
does not know the signedness of the operand: if the value does not fit
in both a 32-bit signed and a 32-bit unsigned then it will use a 64-bit
literal for safety. However it should never do this for VOP3 and VOP3P
encoded instructions, because these encodings do not allow 64-bit
literal operands.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Encoding sometimes uses a 64-bit instead of 32-bit literal because it
does not know the signedness of the operand: if the value does not fit
in both a 32-bit signed and a 32-bit unsigned then it will use a 64-bit
literal for safety. However it should never do this for VOP3 and VOP3P
encoded instructions, because these encodings do not allow 64-bit
literal operands.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Define 1024 VGPRs on gfx1250 (#156765)</title>
<updated>2025-09-03T23:25:18+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-09-03T23:25:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6aebbb0a85a6a675f58e4e727e2e161e03e6e13a'/>
<id>6aebbb0a85a6a675f58e4e727e2e161e03e6e13a</id>
<content type='text'>
This is a baseline support, it is not useable yet.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a baseline support, it is not useable yet.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Update a comment after #155882. NFC.</title>
<updated>2025-08-28T17:36:16+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-08-28T17:36:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=9ae28b61002256eab8d3f983e8444674262c9fbf'/>
<id>9ae28b61002256eab8d3f983e8444674262c9fbf</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Determine MCFixupKind in a more general way. NFCI. (#155864)</title>
<updated>2025-08-28T16:24:49+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-08-28T16:24:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=14485ac524552ae9840ee14890170a499919c138'/>
<id>14485ac524552ae9840ee14890170a499919c138</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Avoid setting op_sel_hi bits if there is matrix_b_scale. NFCI. (#154176)</title>
<updated>2025-08-18T19:13:31+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-08-18T19:13:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3d6177c14b4dca7412d929ef364196a98403ef01'/>
<id>3d6177c14b4dca7412d929ef364196a98403ef01</id>
<content type='text'>
This is NFCI now as there is no matrix_b_scale without matrix_b_reuse,
but technically this condition shall be here.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is NFCI now as there is no matrix_b_scale without matrix_b_reuse,
but technically this condition shall be here.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Add v_cvt_sr|pk_bf8|fp8_f16 gfx1250 instructions (#151415)</title>
<updated>2025-07-31T00:24:45+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2025-07-31T00:24:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ce408632092d48a3da4e17cc282c35058e7f3656'/>
<id>ce408632092d48a3da4e17cc282c35058e7f3656</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
</feed>
