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<title>llvm-project.git/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)</title>
<updated>2025-06-24T09:09:36+00:00</updated>
<author>
<name>Diana Picus</name>
<email>Diana-Magda.Picus@amd.com</email>
</author>
<published>2025-06-24T09:09:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a201f8872a63aa336e4f79a40e196b6c20c9001e'/>
<id>a201f8872a63aa336e4f79a40e196b6c20c9001e</id>
<content type='text'>
Use a function attribute (amdgpu-dynamic-vgpr) instead of a subtarget
feature, as requested in #130030.</content>
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<pre>
Use a function attribute (amdgpu-dynamic-vgpr) instead of a subtarget
feature, as requested in #130030.</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[AMDGPU] Extend test coverage for cross RC register coalescing (#132137)"</title>
<updated>2025-05-05T23:33:18+00:00</updated>
<author>
<name>Jeffrey Byrnes</name>
<email>Jeffrey.Byrnes@amd.com</email>
</author>
<published>2025-05-05T23:33:18+00:00</published>
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<id>8b9ae65d51a14cac5a312bb19cb4757a88fc240b</id>
<content type='text'>
This reverts commit 0bd065dc943ff65e0749a9f2a7b7a672acd45193.
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<pre>
This reverts commit 0bd065dc943ff65e0749a9f2a7b7a672acd45193.
</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Extend test coverage for cross RC register coalescing (#132137)</title>
<updated>2025-05-05T23:20:41+00:00</updated>
<author>
<name>Jeffrey Byrnes</name>
<email>jeffrey.byrnes@amd.com</email>
</author>
<published>2025-05-05T23:20:41+00:00</published>
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<id>0bd065dc943ff65e0749a9f2a7b7a672acd45193</id>
<content type='text'>
Add some test cases for subregister to subregister copies. Also add
cases where the register class is not required by the instruction.</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add some test cases for subregister to subregister copies. Also add
cases where the register class is not required by the instruction.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Teach iterative schedulers about IGLP (#134953)</title>
<updated>2025-04-11T22:34:49+00:00</updated>
<author>
<name>Jeffrey Byrnes</name>
<email>jeffrey.byrnes@amd.com</email>
</author>
<published>2025-04-11T22:34:49+00:00</published>
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<id>6e7fe85247301c52d10d234b87f13376e091c77e</id>
<content type='text'>
This adds IGLP mutation to the iterative schedulers
(`gcn-iterative-max-occupancy-experimental`, `gcn-iterative-minreg`, and
`gcn-iterative-ilp`).

The `gcn-iterative-minreg` and `gcn-iterative-ilp` schedulers never
actually applied the mutations added, so this also has the effect of
teaching them about mutations in general. The
`gcn-iterative-max-occupancy-experimental` scheduler has calls to
`ScheduleDAGMILive::schedule()`, so, before this, mutations were applied
at this point. Now this is done during calls to `BuildDAG`, with IGLP
superseding other mutations (similar to the other schedulers). We may
end up scheduling regions multiple times, with mutations being applied
each time, so we need to track for
`AMDGPU::SchedulingPhase::PreRAReentry`</content>
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<pre>
This adds IGLP mutation to the iterative schedulers
(`gcn-iterative-max-occupancy-experimental`, `gcn-iterative-minreg`, and
`gcn-iterative-ilp`).

The `gcn-iterative-minreg` and `gcn-iterative-ilp` schedulers never
actually applied the mutations added, so this also has the effect of
teaching them about mutations in general. The
`gcn-iterative-max-occupancy-experimental` scheduler has calls to
`ScheduleDAGMILive::schedule()`, so, before this, mutations were applied
at this point. Now this is done during calls to `BuildDAG`, with IGLP
superseding other mutations (similar to the other schedulers). We may
end up scheduling regions multiple times, with mutations being applied
each time, so we need to track for
`AMDGPU::SchedulingPhase::PreRAReentry`</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Optionally Use GCNRPTrackers during scheduling (#93090)</title>
<updated>2024-10-09T16:54:11+00:00</updated>
<author>
<name>Jeffrey Byrnes</name>
<email>jeffrey.byrnes@amd.com</email>
</author>
<published>2024-10-09T16:54:11+00:00</published>
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<id>17bc959961aa5792821516b547100316fc886ab4</id>
<content type='text'>
This adds the ability to use the GCNRPTrackers during scheduling. These trackers have several advantages over the generic trackers: 1. global live-thru trackers, 2. subregister based RP deltas, and 3. flexible vreg -&gt; PressureSet mappings.

This feature is off-by-default to ease with the roll-out process. In particular, when using the optional trackers, the scheduler will still maintain the generic trackers leading to unnecessary compile time.
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<pre>
This adds the ability to use the GCNRPTrackers during scheduling. These trackers have several advantages over the generic trackers: 1. global live-thru trackers, 2. subregister based RP deltas, and 3. flexible vreg -&gt; PressureSet mappings.

This feature is off-by-default to ease with the roll-out process. In particular, when using the optional trackers, the scheduler will still maintain the generic trackers leading to unnecessary compile time.
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Qualify auto. NFC. (#110878)</title>
<updated>2024-10-03T12:07:54+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2024-10-03T12:07:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8d13e7b8c382499c1cf0c2a3184b483e760f266b'/>
<id>8d13e7b8c382499c1cf0c2a3184b483e760f266b</id>
<content type='text'>
Generated automatically with:
$ clang-tidy -fix -checks=-*,llvm-qualified-auto $(find
lib/Target/AMDGPU/ -type f)</content>
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<pre>
Generated automatically with:
$ clang-tidy -fix -checks=-*,llvm-qualified-auto $(find
lib/Target/AMDGPU/ -type f)</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Fix and add namespace closing comments. NFC.</title>
<updated>2024-07-16T15:56:31+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2024-07-16T15:53:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=74b87b02d21583c66c4cf6659703e4bd5c4f537d'/>
<id>74b87b02d21583c66c4cf6659703e4bd5c4f537d</id>
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</content>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Use std::is_same_v. NFC.</title>
<updated>2024-07-16T14:14:07+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2024-07-16T14:13:51+00:00</published>
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<id>b115edc86c3d6d4e1ebc6546000117a77cf80eab</id>
<content type='text'>
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Prefer lower total register usage in regions with spilling</title>
<updated>2024-02-26T20:19:52+00:00</updated>
<author>
<name>Jeffrey Byrnes</name>
<email>Jeffrey.Byrnes@amd.com</email>
</author>
<published>2023-11-09T20:03:06+00:00</published>
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<id>113052b2b022c4ce45c8003057ae4297d48ed843</id>
<content type='text'>
Change-Id: Ia5c434b0945bdcbc357c5e06c3164118fc91df25
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<pre>
Change-Id: Ia5c434b0945bdcbc357c5e06c3164118fc91df25
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Fix GCNUpwardRPTracker. (#71186)</title>
<updated>2023-11-10T12:44:10+00:00</updated>
<author>
<name>Valery Pykhtin</name>
<email>valery.pykhtin@gmail.com</email>
</author>
<published>2023-11-10T12:44:10+00:00</published>
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<id>87b8d9437102c37075b868bcdaab4cbbdceeb37e</id>
<content type='text'>
Fixed:

1. Maximum register pressure calculation at the instruction level. 
Previously max RP included both def and use of registers of an
instruction. Now maximum RP includes _uses_ and _early-clobber defs_.

2. Uses were incorrectly tracked and this resulted in a mismatch of
live-in set reported by LiveIntervals and tracked live reg set when the
beginning of the block is reached.

Interface has changed, moveMaxPressure becomes deprecated and
getMaxPressure, resetMaxPressure functions are added. reset function
seem now more consistent.</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixed:

1. Maximum register pressure calculation at the instruction level. 
Previously max RP included both def and use of registers of an
instruction. Now maximum RP includes _uses_ and _early-clobber defs_.

2. Uses were incorrectly tracked and this resulted in a mismatch of
live-in set reported by LiveIntervals and tracked live reg set when the
beginning of the block is reached.

Interface has changed, moveMaxPressure becomes deprecated and
getMaxPressure, resetMaxPressure functions are added. reset function
seem now more consistent.</pre>
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</entry>
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