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<title>llvm-project.git/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[AMDGPU] Rename AMDGPUCFGStructurizer to R600MachineCFGStructurizer</title>
<updated>2022-02-18T15:08:25+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2022-02-18T14:04:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=57baa14d74425f5f772a7999fc9ba2feb9ecf7c0'/>
<id>57baa14d74425f5f772a7999fc9ba2feb9ecf7c0</id>
<content type='text'>
Previously the name of the class (AMDGPUCFGStructurizer) did not
match the name of the file (AMDILCFGStructurizer).

Standardize on the name R600MachineCFGStructurizer by analogy with
AMDGPUMachineCFGStructurizer.

Differential Revision: https://reviews.llvm.org/D120128
</content>
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<pre>
Previously the name of the class (AMDGPUCFGStructurizer) did not
match the name of the file (AMDILCFGStructurizer).

Standardize on the name R600MachineCFGStructurizer by analogy with
AMDGPUMachineCFGStructurizer.

Differential Revision: https://reviews.llvm.org/D120128
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][NFC] Fix typos</title>
<updated>2022-02-18T14:05:21+00:00</updated>
<author>
<name>Sebastian Neubauer</name>
<email>Sebastian.Neubauer@amd.com</email>
</author>
<published>2022-02-18T13:57:21+00:00</published>
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<id>6527b2a4d5fadd0743e13797968c49ec30112dfe</id>
<content type='text'>
Fix some typos in the amdgpu backend.

Differential Revision: https://reviews.llvm.org/D119235
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<pre>
Fix some typos in the amdgpu backend.

Differential Revision: https://reviews.llvm.org/D119235
</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] Use range-based for loops (NFC)</title>
<updated>2021-12-12T06:34:07+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2021-12-12T06:34:07+00:00</published>
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<id>67aeae0138ff1eac07165f247e39a3bdaa5b17a4</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[Target] Use range-based for loops (NFC)</title>
<updated>2021-11-22T16:21:07+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2021-11-22T16:21:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=59a26448a60e8f2469e5f0a42a4faf87631cc20c'/>
<id>59a26448a60e8f2469e5f0a42a4faf87631cc20c</id>
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</content>
</entry>
<entry>
<title>[llvm] Use range-for loops (NFC)</title>
<updated>2021-11-16T17:01:56+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2021-11-16T17:01:56+00:00</published>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Use MachineBasicBlock::{predecessors,successors} (NFC)</title>
<updated>2021-11-07T02:31:20+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2021-11-07T02:31:20+00:00</published>
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<id>e4bab21848dc5ce734997a9d0dd659f97c31411b</id>
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</content>
</entry>
<entry>
<title>Add new MachineFunction property FailsVerification</title>
<updated>2021-10-18T09:26:46+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2021-10-15T10:26:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=36deb9a670d06fc254df2f357ae595fb8f817d07'/>
<id>36deb9a670d06fc254df2f357ae595fb8f817d07</id>
<content type='text'>
TargetPassConfig::addPass takes a "bool verifyAfter" argument which lets
you skip machine verification after a particular pass. Unfortunately
this is used in generic code in TargetPassConfig itself to skip
verification after a generic pass, only because some previous target-
specific pass damaged the MIR on that specific target. This is bad
because problems in one target cause lack of verification for all
targets.

This patch replaces that mechanism with a new MachineFunction property
called "FailsVerification" which can be set by (usually target-specific)
passes that are known to introduce problems. Later passes can reset it
again if they are known to clean up the previous problems.

Differential Revision: https://reviews.llvm.org/D111397
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<pre>
TargetPassConfig::addPass takes a "bool verifyAfter" argument which lets
you skip machine verification after a particular pass. Unfortunately
this is used in generic code in TargetPassConfig itself to skip
verification after a generic pass, only because some previous target-
specific pass damaged the MIR on that specific target. This is bad
because problems in one target cause lack of verification for all
targets.

This patch replaces that mechanism with a new MachineFunction property
called "FailsVerification" which can be set by (usually target-specific)
passes that are known to introduce problems. Later passes can reset it
again if they are known to clean up the previous problems.

Differential Revision: https://reviews.llvm.org/D111397
</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][AMDGPU] Reduce includes dependencies, part 2</title>
<updated>2021-10-01T14:50:20+00:00</updated>
<author>
<name>Daniil Fukalov</name>
<email>daniil.fukalov@amd.com</email>
</author>
<published>2021-09-07T08:21:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=47d6274d4c31c9b46d059a7421277bef0395a869'/>
<id>47d6274d4c31c9b46d059a7421277bef0395a869</id>
<content type='text'>
1. Splitted out some parts of R600 target to separate modules/headers.
2. Reduced some include lists in headers.
3. Minor forward declarations, redundant includes and flags in GCNSubtarget
   cleanup.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D109351
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<pre>
1. Splitted out some parts of R600 target to separate modules/headers.
2. Reduced some include lists in headers.
3. Minor forward declarations, redundant includes and flags in GCNSubtarget
   cleanup.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D109351
</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen, Target] Use pred_empty and succ_empty (NFC)</title>
<updated>2021-09-10T18:11:31+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2021-09-10T18:11:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c9fca53af10eca9a0ce0e32f553b3b6eb4f0fba6'/>
<id>c9fca53af10eca9a0ce0e32f553b3b6eb4f0fba6</id>
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</pre>
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</content>
</entry>
<entry>
<title>[NFC][AMDGPU] Reduce includes dependencies.</title>
<updated>2021-08-25T09:01:55+00:00</updated>
<author>
<name>Daniil Fukalov</name>
<email>daniil.fukalov@amd.com</email>
</author>
<published>2021-08-23T20:50:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=48958d02d294a3c98bb90bb49dbab614ae4602ac'/>
<id>48958d02d294a3c98bb90bb49dbab614ae4602ac</id>
<content type='text'>
1. Splitted out some parts of R600 target to separate modules/headers.
2. Reduced some include lists in headers.
3. Found and fixed issue with override `GCNTargetMachine::getSubtargetImpl()`
   and `R600TargetMachine::getSubtargetImpl()` had different return value type
   than base class.
4. Minor forward declarations cleanup.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D108596
</content>
<content type='xhtml'>
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<pre>
1. Splitted out some parts of R600 target to separate modules/headers.
2. Reduced some include lists in headers.
3. Found and fixed issue with override `GCNTargetMachine::getSubtargetImpl()`
   and `R600TargetMachine::getSubtargetImpl()` had different return value type
   than base class.
4. Minor forward declarations cleanup.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D108596
</pre>
</div>
</content>
</entry>
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