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<title>llvm-project.git/llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[AMDGPU] Remove calling conv check on entry function (#162080)</title>
<updated>2025-11-10T21:27:55+00:00</updated>
<author>
<name>jofrn</name>
<email>jofernau@amd.com</email>
</author>
<published>2025-11-10T21:27:55+00:00</published>
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<id>fb2fa21bd64a8c21d73438d7ea93dd6f15d15112</id>
<content type='text'>
It is undefined behavior to call a function with a mismatched calling
convention. Rather than crash on this behavior, it should compile.

This LLVM defect was identified via the AMD Fuzzing project.</content>
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<pre>
It is undefined behavior to call a function with a mismatched calling
convention. Rather than crash on this behavior, it should compile.

This LLVM defect was identified via the AMD Fuzzing project.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] upstream barrier count reporting part1 (#154409)</title>
<updated>2025-08-19T23:42:31+00:00</updated>
<author>
<name>Gang Chen</name>
<email>gangc@amd.com</email>
</author>
<published>2025-08-19T23:42:31+00:00</published>
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<id>ef68d1587df199b7503d243bdac703748044c99a</id>
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</content>
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<pre>
</pre>
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</entry>
<entry>
<title>[AMDGPU] Ignore inactive VGPRs in .vgpr_count (#149052)</title>
<updated>2025-08-13T08:47:00+00:00</updated>
<author>
<name>Diana Picus</name>
<email>Diana-Magda.Picus@amd.com</email>
</author>
<published>2025-08-13T08:47:00+00:00</published>
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<id>420a5de1a4abd7285b9f2f1a913914f2198f0a85</id>
<content type='text'>
When using the `amdgcn.init.whole.wave` intrinsic, we add dummy VGPR
arguments with the purpose of preserving their inactive lanes. The
pattern may look something like this:

```
entry:
  call amdgcn.init.whole.wave
  branch to shader or tail

shader:
  $vInactive = IMPLICIT_DEF ; Tells regalloc it's safe to use the active lanes
  actual code...

tail:
  call amdgcn.cs.chain [...], implicit $vInactive
```

We should not report these VGPRs in the `.vgpr_count` metadata. This
patch achieves that goal by ignoring meta instructions and calls. This should
be safe since if those registers are actually used in any other context,
they will be counted there. The same reasoning applies in the general
case, so we don't explicitly check for the existence of `init.whole.wave`.

This is a reworked version of #133242, which was reverted in #144039
and split into smaller bits.</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When using the `amdgcn.init.whole.wave` intrinsic, we add dummy VGPR
arguments with the purpose of preserving their inactive lanes. The
pattern may look something like this:

```
entry:
  call amdgcn.init.whole.wave
  branch to shader or tail

shader:
  $vInactive = IMPLICIT_DEF ; Tells regalloc it's safe to use the active lanes
  actual code...

tail:
  call amdgcn.cs.chain [...], implicit $vInactive
```

We should not report these VGPRs in the `.vgpr_count` metadata. This
patch achieves that goal by ignoring meta instructions and calls. This should
be safe since if those registers are actually used in any other context,
they will be counted there. The same reasoning applies in the general
case, so we don't explicitly check for the existence of `init.whole.wave`.

This is a reworked version of #133242, which was reverted in #144039
and split into smaller bits.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Use SIRegisterInfo to compute used registers. NFCI (#149051)</title>
<updated>2025-07-18T07:22:37+00:00</updated>
<author>
<name>Diana Picus</name>
<email>Diana-Magda.Picus@amd.com</email>
</author>
<published>2025-07-18T07:22:37+00:00</published>
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<id>5bac67d9213da8afa0e35199395774ca3c7daa39</id>
<content type='text'>
Simplify the code in AMDGPUResourceUsageAnalysis to rely more
on the TargetRegisterInfo for computing the number of used SGPRs and
AGPRs. This is a preliminary refactoring split out from #144855.

(While we could technically use TRI to compute the used number of VGPRs
 at this point too, I'm leaving some of the original code in since for
 VGPRs we're going to introduce some special cases).</content>
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<pre>
Simplify the code in AMDGPUResourceUsageAnalysis to rely more
on the TargetRegisterInfo for computing the number of used SGPRs and
AGPRs. This is a preliminary refactoring split out from #144855.

(While we could technically use TRI to compute the used number of VGPRs
 at this point too, I'm leaving some of the original code in since for
 VGPRs we're going to introduce some special cases).</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU][NewPM] Port "AMDGPUResourceUsageAnalysis" to NPM (#130959)</title>
<updated>2025-07-10T08:05:43+00:00</updated>
<author>
<name>Vikram Hegde</name>
<email>115221833+vikramRH@users.noreply.github.com</email>
</author>
<published>2025-07-10T08:05:43+00:00</published>
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<id>1ccd7793247139e55aec986e6d86c50d97f9a755</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>Revert "[AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (#… (#144039)</title>
<updated>2025-06-13T10:48:24+00:00</updated>
<author>
<name>Diana Picus</name>
<email>Diana-Magda.Picus@amd.com</email>
</author>
<published>2025-06-13T10:48:24+00:00</published>
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<id>a5cbd2ab0bebc722f836cd3b04dbab691ef9ed2f</id>
<content type='text'>
…133242)"

This reverts commit 130080fab11cde5efcb338b77f5c3b31097df6e6 because it
causes issues in testcases similar to coalescer_remat.ll [1], i.e. when
we use a VGPR tuple but only write to its lower parts. The high VGPRs
would then not be included in the vgpr_count, and accessing them would
be an out of bounds violation.

[1]
https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/AMDGPU/coalescer_remat.ll</content>
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<pre>
…133242)"

This reverts commit 130080fab11cde5efcb338b77f5c3b31097df6e6 because it
causes issues in testcases similar to coalescer_remat.ll [1], i.e. when
we use a VGPR tuple but only write to its lower parts. The high VGPRs
would then not be included in the vgpr_count, and accessing them would
be an out of bounds violation.

[1]
https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/AMDGPU/coalescer_remat.ll</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Skip register uses in AMDGPUResourceUsageAnalysis (#133242)</title>
<updated>2025-06-03T09:20:48+00:00</updated>
<author>
<name>Diana Picus</name>
<email>Diana-Magda.Picus@amd.com</email>
</author>
<published>2025-06-03T09:20:48+00:00</published>
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<id>130080fab11cde5efcb338b77f5c3b31097df6e6</id>
<content type='text'>
Don't count register uses when determining the maximum number of
registers used by a function. Count only the defs. This is really an
underestimate of the true register usage, but in practice that's not
a problem because if a function uses a register, then it has either
defined it earlier, or some other function that executed before has
defined it.

In particular, the register counts are used:
1. When launching an entry function - in which case we're safe because
   the register counts of the entry function will include the register
   counts of all callees.
2. At function boundaries in dynamic VGPR mode. In this case it's safe
   because whenever we set the new VGPR allocation we take into account
   the outgoing_vgpr_count set by the middle-end.

The main advantage of doing this is that the artificial VGPR arguments
used only for preserving the inactive lanes when using the
llvm.amdgcn.init.whole.wave intrinsic are no longer counted. This
enables us to allocate only the registers we need in dynamic VGPR mode.

---------

Co-authored-by: Thomas Symalla &lt;5754458+tsymalla@users.noreply.github.com&gt;</content>
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<pre>
Don't count register uses when determining the maximum number of
registers used by a function. Count only the defs. This is really an
underestimate of the true register usage, but in practice that's not
a problem because if a function uses a register, then it has either
defined it earlier, or some other function that executed before has
defined it.

In particular, the register counts are used:
1. When launching an entry function - in which case we're safe because
   the register counts of the entry function will include the register
   counts of all callees.
2. At function boundaries in dynamic VGPR mode. In this case it's safe
   because whenever we set the new VGPR allocation we take into account
   the outgoing_vgpr_count set by the middle-end.

The main advantage of doing this is that the artificial VGPR arguments
used only for preserving the inactive lanes when using the
llvm.amdgcn.init.whole.wave intrinsic are no longer counted. This
enables us to allocate only the registers we need in dynamic VGPR mode.

---------

Co-authored-by: Thomas Symalla &lt;5754458+tsymalla@users.noreply.github.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU] Remove unused includes (NFC) (#116154)</title>
<updated>2024-11-14T05:10:03+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-14T05:10:03+00:00</published>
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<id>be187369a03bf2df8bdbc76ecd381377b3bb6074</id>
<content type='text'>
Identified with misc-include-cleaner.</content>
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<pre>
Identified with misc-include-cleaner.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Factor out getNumUsedPhysRegs(). NFC. (#112624)</title>
<updated>2024-10-17T07:47:19+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>rampitec@users.noreply.github.com</email>
</author>
<published>2024-10-17T07:47:19+00:00</published>
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<id>1cc5290a30a0d6dffeb2e0f475558fcf3ded8e1f</id>
<content type='text'>
I will need it from one more place.</content>
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<pre>
I will need it from one more place.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Convert AMDGPUResourceUsageAnalysis pass from Module to MF pass (#102913)</title>
<updated>2024-09-30T10:43:34+00:00</updated>
<author>
<name>Janek van Oirschot</name>
<email>janek.vanoirschot@amd.com</email>
</author>
<published>2024-09-30T10:43:34+00:00</published>
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<id>c897c13dde3bb413e723317c0579781fb6045a8b</id>
<content type='text'>
Converts AMDGPUResourceUsageAnalysis pass from Module to MachineFunction
pass. Moves function resource info propagation to to MC layer (through
helpers in AMDGPUMCResourceInfo) by generating MCExprs for every
function resource which the emitters have been prepped for.

Fixes https://github.com/llvm/llvm-project/issues/64863</content>
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<pre>
Converts AMDGPUResourceUsageAnalysis pass from Module to MachineFunction
pass. Moves function resource info propagation to to MC layer (through
helpers in AMDGPUMCResourceInfo) by generating MCExprs for every
function resource which the emitters have been prepped for.

Fixes https://github.com/llvm/llvm-project/issues/64863</pre>
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</content>
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