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<title>llvm-project.git/llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[AMDGPU] Qualify auto. NFC. (#110878)</title>
<updated>2024-10-03T12:07:54+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2024-10-03T12:07:54+00:00</published>
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Generated automatically with:
$ clang-tidy -fix -checks=-*,llvm-qualified-auto $(find
lib/Target/AMDGPU/ -type f)</content>
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Generated automatically with:
$ clang-tidy -fix -checks=-*,llvm-qualified-auto $(find
lib/Target/AMDGPU/ -type f)</pre>
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</entry>
<entry>
<title>NewPM/AMDGPU: Port AMDGPUPerfHintAnalysis to new pass manager (#102645)</title>
<updated>2024-08-11T11:11:10+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2024-08-11T11:11:10+00:00</published>
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This was much more difficult than I anticipated. The pass is
not in a good state, with poor test coverage. The legacy PM
does seem to be relying on maintaining the map state between
different SCCs, which seems bad. The pass is going out of its
way to avoid putting the attributes it introduces onto non-callee
functions. If it just added them, we could use them directly
instead of relying on the map, I would think.

The NewPM path uses a ModulePass; I'm not sure if we should be
using CGSCC here but there seems to be some missing infrastructure
to support backend defined ones.</content>
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<pre>
This was much more difficult than I anticipated. The pass is
not in a good state, with poor test coverage. The legacy PM
does seem to be relying on maintaining the map state between
different SCCs, which seems bad. The pass is going out of its
way to avoid putting the attributes it introduces onto non-callee
functions. If it just added them, we could use them directly
instead of relying on the map, I would think.

The NewPM path uses a ModulePass; I'm not sure if we should be
using CGSCC here but there seems to be some missing infrastructure
to support backend defined ones.</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Use member initializers. NFC.</title>
<updated>2024-07-16T14:29:10+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2024-07-16T14:29:10+00:00</published>
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</entry>
<entry>
<title>[AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access</title>
<updated>2022-07-19T09:46:28+00:00</updated>
<author>
<name>Abinav Puthan Purayil</name>
<email>abinavpp@gmail.com</email>
</author>
<published>2022-07-13T06:40:02+00:00</published>
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<id>9fa425c1ab2f763da14953f22f005dd1ca581c1c</id>
<content type='text'>
AMDGPUPerfHintAnalysis doesn't set the memory bound attribute if
FuncInfo::InstCost outweighs MemInstCost even if we have a basic block
with relatively high global memory access. GCNSchedStrategy could revert
optimal scheduling in favour of occupancy which seems to degrade
performance for some kernels. This change introduces the
HasDenseGlobalMemAcc metric in the heuristic that makes the analysis
more conservative in these cases.

This fixes SWDEV-334259/SWDEV-343932

Differential Revision: https://reviews.llvm.org/D129759
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AMDGPUPerfHintAnalysis doesn't set the memory bound attribute if
FuncInfo::InstCost outweighs MemInstCost even if we have a basic block
with relatively high global memory access. GCNSchedStrategy could revert
optimal scheduling in favour of occupancy which seems to degrade
performance for some kernels. This change introduces the
HasDenseGlobalMemAcc metric in the heuristic that makes the analysis
more conservative in these cases.

This fixes SWDEV-334259/SWDEV-343932

Differential Revision: https://reviews.llvm.org/D129759
</pre>
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</entry>
<entry>
<title>[AMDGPU] Use default member initialization (NFC)</title>
<updated>2022-07-16T19:44:35+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-07-16T19:44:35+00:00</published>
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Identified with modernize-use-default-member-init.
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Identified with modernize-use-default-member-init.
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</entry>
<entry>
<title>[AMDGPU][NFC] Remove isConstantAddr</title>
<updated>2022-06-17T00:49:29+00:00</updated>
<author>
<name>LiaoChunyu</name>
<email>chunyu@iscas.ac.cn</email>
</author>
<published>2022-06-16T12:58:02+00:00</published>
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<id>6181c192837d799c320030bb227b655b83577130</id>
<content type='text'>
fix isConstantAddr defined but not used

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D127959
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fix isConstantAddr defined but not used

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D127959
</pre>
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</entry>
<entry>
<title>[AMDGPU] Only count global-to-global as indirect accesses</title>
<updated>2022-04-01T12:48:13+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2022-03-31T12:39:02+00:00</published>
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<id>c246b7bd4a5191d48f68ce12b50e03bfadd2a0b5</id>
<content type='text'>
Previously any load (global, local or constant) feeding into a
global load or store would be counted as an indirect access. This
patch only counts global loads feeding into a global load or store.
The rationale is that the latency for global loads is generally
much larger than the other kinds.

As a side effect this makes it easier to write small kernels test
cases that are not counted as having indirect accesses, despite
the fact that arguments to the kernel are accessed with an SMEM
load.

Differential Revision: https://reviews.llvm.org/D122804
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<pre>
Previously any load (global, local or constant) feeding into a
global load or store would be counted as an indirect access. This
patch only counts global loads feeding into a global load or store.
The rationale is that the latency for global loads is generally
much larger than the other kinds.

As a side effect this makes it easier to write small kernels test
cases that are not counted as having indirect accesses, despite
the fact that arguments to the kernel are accessed with an SMEM
load.

Differential Revision: https://reviews.llvm.org/D122804
</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Return better Changed status from AMDGPUPerfHintAnalysis</title>
<updated>2022-02-17T09:31:42+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2022-02-16T11:00:05+00:00</published>
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<id>1822a5ecdd363ffcf465a7ad2e4e6fb92cab69f7</id>
<content type='text'>
Differential Revision: https://reviews.llvm.org/D119944
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<pre>
Differential Revision: https://reviews.llvm.org/D119944
</pre>
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</entry>
<entry>
<title>[AMDGPUPerfHintAnalysis] Avoid getPointerElementType()</title>
<updated>2021-12-13T15:48:21+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2021-12-13T15:45:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=220815a91a31459c9401604ce5859f2d61579c4b'/>
<id>220815a91a31459c9401604ce5859f2d61579c4b</id>
<content type='text'>
Extract the load/store type from the instruction rather than
fetching it from the pointer element type.
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<pre>
Extract the load/store type from the instruction rather than
fetching it from the pointer element type.
</pre>
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</entry>
<entry>
<title>[AMDGPU] Tune perfhint analysis to account access width</title>
<updated>2021-07-21T19:46:10+00:00</updated>
<author>
<name>Stanislav Mekhanoshin</name>
<email>Stanislav.Mekhanoshin@amd.com</email>
</author>
<published>2021-07-08T19:23:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a397c1c82f1c49106d1459c8f755e4a52743b882'/>
<id>a397c1c82f1c49106d1459c8f755e4a52743b882</id>
<content type='text'>
A function with less memory instructions but wider access
is the same as a function with more but narrower accesses
in terms of memory boundness. In fact the pass would give
different answers before and after vectorization without
this change.

Differential Revision: https://reviews.llvm.org/D105651
</content>
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A function with less memory instructions but wider access
is the same as a function with more but narrower accesses
in terms of memory boundness. In fact the pass would give
different answers before and after vectorization without
this change.

Differential Revision: https://reviews.llvm.org/D105651
</pre>
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</entry>
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