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<title>llvm-project.git/llvm/lib/CodeGen, branch users/chapuni/cov/single/switch</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[AIX][AsmPrinter] Fix unsigned subtraction wrap-around (#122214)</title>
<updated>2025-01-09T04:07:57+00:00</updated>
<author>
<name>Hubert Tong</name>
<email>hubert.reinterpretcast@gmail.com</email>
</author>
<published>2025-01-09T04:07:57+00:00</published>
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<id>e438513f2e2ff7a19c671983ff22a14909c96859</id>
<content type='text'>
Unsigned subtraction wrap-around occurs in `emitGlobalConstantImpl` on
an AIX-specific code path from 8e4423eb0888 when a structure type has
zero elements.

With assertions enabled, this manifests as:
```
TypeSize llvm::StructLayout::getElementOffset(unsigned int) const: Assertion `Idx &lt; NumElements &amp;&amp; "Invalid element idx!"' failed.
```</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Unsigned subtraction wrap-around occurs in `emitGlobalConstantImpl` on
an AIX-specific code path from 8e4423eb0888 when a structure type has
zero elements.

With assertions enabled, this manifests as:
```
TypeSize llvm::StructLayout::getElementOffset(unsigned int) const: Assertion `Idx &lt; NumElements &amp;&amp; "Invalid element idx!"' failed.
```</pre>
</div>
</content>
</entry>
<entry>
<title>[LLVM][DWARF] Create debug names entry for non-tu top level DIE (#121856)</title>
<updated>2025-01-09T01:08:35+00:00</updated>
<author>
<name>Alexander Yermolovich</name>
<email>43973793+ayermolo@users.noreply.github.com</email>
</author>
<published>2025-01-09T01:08:35+00:00</published>
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<id>fce0314c384f72cacbfcce148c9d110687c78261</id>
<content type='text'>
When creating a Type Unit (TU), LLVM attempts to do so optimistically.
However, if this fails, it discards the TU state and creates the TU
within the Compilation Unit (CU). In such cases, an entry for the
top-level DIE is not created in the debug names table.
This can cause issues when running llvm-dwarfdump --debug-names
--verify, as the missing entry will result in verification failure.
To address this issue, this patch adds a call to the
updateAcceleratorTables when TU creation fails. This ensures that the
debug names table is updated correctly, even in cases where TU creation
fails.</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When creating a Type Unit (TU), LLVM attempts to do so optimistically.
However, if this fails, it discards the TU state and creates the TU
within the Compilation Unit (CU). In such cases, an entry for the
top-level DIE is not created in the debug names table.
This can cause issues when running llvm-dwarfdump --debug-names
--verify, as the missing entry will result in verification failure.
To address this issue, this patch adds a call to the
updateAcceleratorTables when TU creation fails. This ensures that the
debug names table is updated correctly, even in cases where TU creation
fails.</pre>
</div>
</content>
</entry>
<entry>
<title>[ReachingDefAnalysis][NFC] Rename `PhysReg` to `Reg`. (#122112)</title>
<updated>2025-01-08T15:00:41+00:00</updated>
<author>
<name>Mikhail Gudim</name>
<email>mgudim@gmail.com</email>
</author>
<published>2025-01-08T15:00:41+00:00</published>
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<id>f37bee1d929a90dd3dbb67a4a9d0a52400a8a78f</id>
<content type='text'>
This is in order to prepare for future MR where we will extend
`ReachingDefAnalysis` to stack slots.
</content>
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<pre>
This is in order to prepare for future MR where we will extend
`ReachingDefAnalysis` to stack slots.
</pre>
</div>
</content>
</entry>
<entry>
<title>[LLVM] Fix various cl::desc typos and whitespace issues (NFC) (#121955)</title>
<updated>2025-01-08T10:07:23+00:00</updated>
<author>
<name>Ryan Mansfield</name>
<email>ryan_mansfield@apple.com</email>
</author>
<published>2025-01-08T10:07:23+00:00</published>
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<id>67efbd0bf1b2df8a479e09eb2be7db4c3c892f2c</id>
<content type='text'>
</content>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[X86] Combine `uitofp &lt;v x i32&gt; to &lt;v x half&gt;` (#121809)</title>
<updated>2025-01-08T08:49:29+00:00</updated>
<author>
<name>abhishek-kaushik22</name>
<email>abhishek.kaushik@intel.com</email>
</author>
<published>2025-01-08T08:49:29+00:00</published>
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<id>366e62a0cb5d1c94d3b281f094755c4dd4c76df9</id>
<content type='text'>
Closes #121793</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Closes #121793</pre>
</div>
</content>
</entry>
<entry>
<title>[Coalescer] Consider NewMI's subreg index when updating lanemask. (#121780)</title>
<updated>2025-01-07T15:06:00+00:00</updated>
<author>
<name>Sander de Smalen</name>
<email>sander.desmalen@arm.com</email>
</author>
<published>2025-01-07T15:06:00+00:00</published>
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<id>82ec2d6aa45fcfbfcf9f12504c10b1e457bda65c</id>
<content type='text'>
The code added in #116191 that updated the lanemasks for rematerialized
values checked if `DefMI`'s destination register had a subreg index.
This seems to have missed the following case:

```
  %0:gpr32 = MOVi32imm 1
  %1:gpr64 = SUBREG_TO_REG 0, %0:gpr32, %subreg.sub_32
```

which during rematerialization would have the following variables set:

```
  DefMI = %0:gpr32 = MOVi32imm 1

  NewMI = %3.sub_32:gpr64 = MOVi32imm 1   (rematerialized value)
```

When checking whether the lanemasks need to be generated, considering
whether DefMI's destination has a subreg index is insufficient, we
should look at DefMI's subreg index instead.

The added tests are a bit more involved, because I was not able to
reconstruct the issue without having some control flow in the test.
These tests come from actual reproducers.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The code added in #116191 that updated the lanemasks for rematerialized
values checked if `DefMI`'s destination register had a subreg index.
This seems to have missed the following case:

```
  %0:gpr32 = MOVi32imm 1
  %1:gpr64 = SUBREG_TO_REG 0, %0:gpr32, %subreg.sub_32
```

which during rematerialization would have the following variables set:

```
  DefMI = %0:gpr32 = MOVi32imm 1

  NewMI = %3.sub_32:gpr64 = MOVi32imm 1   (rematerialized value)
```

When checking whether the lanemasks need to be generated, considering
whether DefMI's destination has a subreg index is insufficient, we
should look at DefMI's subreg index instead.

The added tests are a bit more involved, because I was not able to
reconstruct the issue without having some control flow in the test.
These tests come from actual reproducers.</pre>
</div>
</content>
</entry>
<entry>
<title>[DAG] TransformFPLoadStorePair - early out if we're not loading a simple type</title>
<updated>2025-01-07T13:37:23+00:00</updated>
<author>
<name>Simon Pilgrim</name>
<email>llvm-dev@redking.me.uk</email>
</author>
<published>2025-01-07T13:37:03+00:00</published>
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<id>1332db36ee23f19eacf6a84bfda0f9c03a5706e7</id>
<content type='text'>
Its never going to transform into a legal integer type, so just bail - noticed while triaging the assertion reported in #121784
</content>
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<pre>
Its never going to transform into a legal integer type, so just bail - noticed while triaging the assertion reported in #121784
</pre>
</div>
</content>
</entry>
<entry>
<title>[Coalescer] Move code added in #116191 (#121779)</title>
<updated>2025-01-07T09:57:18+00:00</updated>
<author>
<name>Sander de Smalen</name>
<email>sander.desmalen@arm.com</email>
</author>
<published>2025-01-07T09:57:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=5514865147c3bca1c819d2658ce3bf113aeffa00'/>
<id>5514865147c3bca1c819d2658ce3bf113aeffa00</id>
<content type='text'>
By moving the code a bit later, we can factor out some of the conditions
as those are now already tested.
This will also be useful when adding another fix on top that uses
`NewMI`'s subreg index (to follow as a separate PR).

The change is intended to be NFC.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
By moving the code a bit later, we can factor out some of the conditions
as those are now already tested.
This will also be useful when adding another fix on top that uses
`NewMI`'s subreg index (to follow as a separate PR).

The change is intended to be NFC.</pre>
</div>
</content>
</entry>
<entry>
<title>RegisterCoalescer: Fix assert on remat to copy-to-physreg with subregs (#121734)</title>
<updated>2025-01-07T05:22:23+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-01-07T05:22:23+00:00</published>
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<id>8c0483bba2d25ae7e4b6cac150dba9447dfed59c</id>
<content type='text'>
Do not try to rematerialize a super-register def used by a subregister
extract copy into a copy to a physical register if the other pieces of
the
full physreg are live at the rematerialization point. It would insert
the
super-register def at the rematerialization point, and assert since the
other half of the register was already live.

This is analagous to the undef subregister def handling above,
which handled the virtual register case.

Fixes #120970</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Do not try to rematerialize a super-register def used by a subregister
extract copy into a copy to a physical register if the other pieces of
the
full physreg are live at the rematerialization point. It would insert
the
super-register def at the rematerialization point, and assert since the
other half of the register was already live.

This is analagous to the undef subregister def handling above,
which handled the virtual register case.

Fixes #120970</pre>
</div>
</content>
</entry>
<entry>
<title>[DAG] VectorLegalizer::ExpandUINT_TO_FLOAT- pull out repeated getValueType calls. NFC.</title>
<updated>2025-01-06T18:49:51+00:00</updated>
<author>
<name>Simon Pilgrim</name>
<email>llvm-dev@redking.me.uk</email>
</author>
<published>2025-01-06T18:37:57+00:00</published>
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<id>923675193b24d3123ece0a3504c7cd49fc7410e9</id>
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</content>
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<pre>
</pre>
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</entry>
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