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<title>llvm-project.git/llvm/lib/CodeGen/SwiftErrorValueTracking.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[CodeGen] Remove atEnd method from defusechain iterators (#120610)</title>
<updated>2025-01-02T17:29:55+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-01-02T17:29:55+00:00</published>
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<content type='text'>
This was not used much and there are better ways of writing it.</content>
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This was not used much and there are better ways of writing it.</pre>
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<entry>
<title>[SwiftError] Use IMPLICIT_DEF as a definition for unreachable VReg uses</title>
<updated>2023-08-20T11:00:31+00:00</updated>
<author>
<name>Filipp Zhinkin</name>
<email>filipp.zhinkin@gmail.com</email>
</author>
<published>2023-01-05T14:57:42+00:00</published>
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SwiftErrorValueTracking creates vregs at swifterror use sites and then
connects it with appropriate definitions after instruction selection.
To propagate swifterror values SwiftErrorValueTracking::propagateVRegs
iterates over basic blocks in RPO, but some vregs previously created
at use sites may be located in blocks that became unreachable after
instruction selection. Because of that there will no definition for
such vregs and that may cause issues down the pipeline.

To ensure that all vregs created by the SwiftErrorValueTracking will
be defined propagateVRegs was updated to insert IMPLICIT_DEF at the
beginning of unreachable blocks containing swifterror uses.

Related issue: https://github.com/llvm/llvm-project/issues/59751

Reviewed By: compnerd

Differential Revision: https://reviews.llvm.org/D141053
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<pre>
SwiftErrorValueTracking creates vregs at swifterror use sites and then
connects it with appropriate definitions after instruction selection.
To propagate swifterror values SwiftErrorValueTracking::propagateVRegs
iterates over basic blocks in RPO, but some vregs previously created
at use sites may be located in blocks that became unreachable after
instruction selection. Because of that there will no definition for
such vregs and that may cause issues down the pipeline.

To ensure that all vregs created by the SwiftErrorValueTracking will
be defined propagateVRegs was updated to insert IMPLICIT_DEF at the
beginning of unreachable blocks containing swifterror uses.

Related issue: https://github.com/llvm/llvm-project/issues/59751

Reviewed By: compnerd

Differential Revision: https://reviews.llvm.org/D141053
</pre>
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</content>
</entry>
<entry>
<title>Use any_of (NFC)</title>
<updated>2022-07-30T17:35:56+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-07-30T17:35:56+00:00</published>
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<entry>
<title>[CodeGen] Qualify auto variables in for loops (NFC)</title>
<updated>2022-07-17T08:33:28+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2022-07-17T08:33:28+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>[CodeGen, DebugInfo] Use llvm::find_if (NFC)</title>
<updated>2021-01-10T17:24:53+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2021-01-10T17:24:53+00:00</published>
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<id>9850d3b10a10aff00d31adf0633a4ba2b840f824</id>
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<pre>
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</entry>
<entry>
<title>[CallSite removal][CodeGen] Use CallBase instead of ImmutableCallSite in SwiftErrorValueTracking. NFC</title>
<updated>2020-04-13T07:19:27+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@gmail.com</email>
</author>
<published>2020-04-13T06:09:35+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each</title>
<updated>2019-10-19T01:31:09+00:00</updated>
<author>
<name>Reid Kleckner</name>
<email>rnk@google.com</email>
</author>
<published>2019-10-19T01:31:09+00:00</published>
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<id>904cd3e06b980baa90c6cd6614321b904a05e162</id>
<content type='text'>
Now X86ISelLowering doesn't depend on many IR analyses.

llvm-svn: 375320
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Now X86ISelLowering doesn't depend on many IR analyses.

llvm-svn: 375320
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</entry>
<entry>
<title>GlobalISel: Remove unsigned variant of SrcOp</title>
<updated>2019-06-24T16:16:12+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2019-06-24T16:16:12+00:00</published>
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<id>faeaedf8e938696497021adcd5925e5741c72f62</id>
<content type='text'>
Force using Register.

One downside is the generated register enums require explicit
conversion.

llvm-svn: 364194
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<pre>
Force using Register.

One downside is the generated register enums require explicit
conversion.

llvm-svn: 364194
</pre>
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</content>
</entry>
<entry>
<title>CodeGen: Introduce a class for registers</title>
<updated>2019-06-24T15:50:29+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2019-06-24T15:50:29+00:00</published>
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<id>e3a676e9adba668a7da944766218e98dd4b2c10a</id>
<content type='text'>
Avoids using a plain unsigned for registers throughoug codegen.
Doesn't attempt to change every register use, just something a little
more than the set needed to build after changing the return type of
MachineOperand::getReg().

llvm-svn: 364191
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<pre>
Avoids using a plain unsigned for registers throughoug codegen.
Doesn't attempt to change every register use, just something a little
more than the set needed to build after changing the return type of
MachineOperand::getReg().

llvm-svn: 364191
</pre>
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</content>
</entry>
<entry>
<title>CodeGen: factor out swifterror value tracking.</title>
<updated>2019-05-24T08:39:43+00:00</updated>
<author>
<name>Tim Northover</name>
<email>tnorthover@apple.com</email>
</author>
<published>2019-05-24T08:39:43+00:00</published>
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<id>3d7a057b0d1d978da382c4ae71653b03f09efa54</id>
<content type='text'>
llvm-svn: 361607
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<pre>
llvm-svn: 361607
</pre>
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