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<title>llvm-project.git/llvm/lib/CodeGen/StackSlotColoring.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[StackSlotColoring] Fix issue where colors for a StackID are dropped (#138140)</title>
<updated>2025-05-02T09:23:39+00:00</updated>
<author>
<name>Benjamin Maxwell</name>
<email>benjamin.maxwell@arm.com</email>
</author>
<published>2025-05-02T09:23:39+00:00</published>
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<content type='text'>
In InitializeSlots, if an interval with a non-zero StackID (A) is
encountered we set All/UsedColors to a size of A + 1. If after this we
process another interval with a non-zero StackID (B), where B &lt; A, then
we resize All/UsedColors to size &lt; A + 1, and lose the BitVector
associated with A.

AFAIK this is a latent bug upstream, but when adding a new TargetStackID
locally I hit a `NextColors[StackID] != -1 &amp;&amp; "No more spill slots?"`
assertion due to this issue.</content>
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<pre>
In InitializeSlots, if an interval with a non-zero StackID (A) is
encountered we set All/UsedColors to a size of A + 1. If after this we
process another interval with a non-zero StackID (B), where B &lt; A, then
we resize All/UsedColors to size &lt; A + 1, and lose the BitVector
associated with A.

AFAIK this is a latent bug upstream, but when adding a new TargetStackID
locally I hit a `NextColors[StackID] != -1 &amp;&amp; "No more spill slots?"`
assertion due to this issue.</pre>
</div>
</content>
</entry>
<entry>
<title>[TTI] Use TypeSize in isLoadFromStackSlot and isStoreToStackSlot [nfc] (#132244)</title>
<updated>2025-03-20T17:17:36+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2025-03-20T17:17:36+00:00</published>
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<content type='text'>
Motivation is supporting scalable spills and reloads, e.g. in
https://github.com/llvm/llvm-project/pull/120524.

Looking at this API, I'm suspicious that the access size should just be
coming from the memory operand on the load or store, but we don't appear
to be consistently setting that up. That's a larger change so I may or
may not bother pursuing that.</content>
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<pre>
Motivation is supporting scalable spills and reloads, e.g. in
https://github.com/llvm/llvm-project/pull/120524.

Looking at this API, I'm suspicious that the access size should just be
coming from the memory operand on the load or store, but we don't appear
to be consistently setting that up. That's a larger change so I may or
may not bother pursuing that.</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen][NewPM] Port StackSlotColoring to NPM. (#125876)</title>
<updated>2025-02-05T17:48:16+00:00</updated>
<author>
<name>Christudasan Devadasan</name>
<email>christudasan.devadasan@amd.com</email>
</author>
<published>2025-02-05T17:48:16+00:00</published>
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<id>d86e379fd2ed8292bb2df44fe6f40692869f40c3</id>
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<pre>
</pre>
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</entry>
<entry>
<title>[CodeGen] Add Register::stackSlotIndex(). Replace uses of Register::stackSlot2Index. NFC (#125028)</title>
<updated>2025-01-30T07:02:07+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-01-30T07:02:07+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>[CodeGen][NewPM] Port LiveStacks analysis to NPM (#118778)</title>
<updated>2024-12-06T09:46:07+00:00</updated>
<author>
<name>Akshat Oke</name>
<email>Akshat.Oke@amd.com</email>
</author>
<published>2024-12-06T09:46:07+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>[CodeGen][NewPM] Port LiveDebugVariables to NPM (#115468)</title>
<updated>2024-12-04T09:01:34+00:00</updated>
<author>
<name>Akshat Oke</name>
<email>Akshat.Oke@amd.com</email>
</author>
<published>2024-12-04T09:01:34+00:00</published>
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<id>d9b4bdbff597d0ed98dd82674e456ac4c751a6a0</id>
<content type='text'>
The existing analysis was already a pimpl wrapper.

I have extracted legacy pass logic to a LDVImpl wrapper named
`LiveDebugVariables` which is the analysis::Result now. This controls
whether to activate the LDV (depending on `-live-debug-variables` and
DIsubprogram) itself.

The legacy and new analysis only construct the LiveDebugVariables.

VirtRegRewriter will test this.</content>
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<pre>
The existing analysis was already a pimpl wrapper.

I have extracted legacy pass logic to a LDVImpl wrapper named
`LiveDebugVariables` which is the analysis::Result now. This controls
whether to activate the LDV (depending on `-live-debug-variables` and
DIsubprogram) itself.

The legacy and new analysis only construct the LiveDebugVariables.

VirtRegRewriter will test this.</pre>
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</content>
</entry>
<entry>
<title>[CodeGen] Remove unused includes (NFC) (#115996)</title>
<updated>2024-11-13T07:15:06+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-13T07:15:06+00:00</published>
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<content type='text'>
Identified with misc-include-cleaner.</content>
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<pre>
Identified with misc-include-cleaner.</pre>
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</content>
</entry>
<entry>
<title>[StackSlotColoring] Use Register for isLoadFromStackSlot/isStoreToStackSlot result. NFC</title>
<updated>2024-09-15T19:05:28+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2024-09-15T18:40:00+00:00</published>
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<id>76b54df87a860c20ac68e4ed1d766b545d412c1e</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[CodeGen] Use range-based for loops (NFC) (#98706)</title>
<updated>2024-07-13T20:29:47+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-07-13T20:29:47+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>[CodeGen][NewPM] Port `machine-block-freq` to new pass manager (#98317)</title>
<updated>2024-07-12T07:45:01+00:00</updated>
<author>
<name>paperchalice</name>
<email>liujunchang97@outlook.com</email>
</author>
<published>2024-07-12T07:45:01+00:00</published>
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<id>099899961c1e89a1789f534579d35a74a2ef1dda</id>
<content type='text'>
- Add `MachineBlockFrequencyAnalysis`.
- Add `MachineBlockFrequencyPrinterPass`.
- Use `MachineBlockFrequencyInfoWrapperPass` in legacy pass manager.
- `LazyMachineBlockFrequencyInfo::print` is empty, drop it due to new
pass manager migration.</content>
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<pre>
- Add `MachineBlockFrequencyAnalysis`.
- Add `MachineBlockFrequencyPrinterPass`.
- Use `MachineBlockFrequencyInfoWrapperPass` in legacy pass manager.
- `LazyMachineBlockFrequencyInfo::print` is empty, drop it due to new
pass manager migration.</pre>
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