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<title>llvm-project.git/llvm/lib/CodeGen/SplitKit.cpp, branch main</title>
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<entry>
<title>SplitKit: Use initializer lists (#167449)</title>
<updated>2025-11-11T04:48:30+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-11-11T04:48:30+00:00</published>
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<entry>
<title>[CodeGen] Finish untangling LRE::scanRemattable [nfc] (#161963)</title>
<updated>2025-10-07T14:19:58+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2025-10-07T14:19:58+00:00</published>
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<content type='text'>
This is an attempt to simplify the rematerialization logic in
InlineSpiller and SplitKit. I'd earlier done the same for
RegisterCoalescer in 57b673.

The basic idea of this change is that we don't need to check whether an
instruction is rematerializable early. Instead, we can defer the check
to the point where we're actually trying to materialize something. We
also don't need to indirect that query through a VNI key, and can
instead just check the instruction directly at the use site.</content>
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<pre>
This is an attempt to simplify the rematerialization logic in
InlineSpiller and SplitKit. I'd earlier done the same for
RegisterCoalescer in 57b673.

The basic idea of this change is that we don't need to check whether an
instruction is rematerializable early. Instead, we can defer the check
to the point where we're actually trying to materialize something. We
also don't need to indirect that query through a VNI key, and can
instead just check the instruction directly at the use site.</pre>
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</entry>
<entry>
<title>[llvm] Use llvm::SmallVector::pop_back_val (NFC) (#136533)</title>
<updated>2025-04-21T15:13:16+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-04-21T15:13:16+00:00</published>
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<entry>
<title>[CodeGen] Remove parameter from LiveRangeEdit::canRematerializeAt [NFC]</title>
<updated>2025-03-14T16:12:07+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2025-03-14T16:04:52+00:00</published>
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<id>bdb4012fe3f9e30e2ea3e1d92524ad7725b2957e</id>
<content type='text'>
Only one caller cares about the true case of this parameter, so move
the check to that single caller.  Note that RegisterCoalescer seems
like it should care, but it already duplicates the check several
lines above.
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Only one caller cares about the true case of this parameter, so move
the check to that single caller.  Note that RegisterCoalescer seems
like it should care, but it already duplicates the check several
lines above.
</pre>
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</entry>
<entry>
<title>[CodeGen] Use early return to simplify SplitEditor::defFromParent [NFC]</title>
<updated>2025-03-13T23:13:26+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2025-03-13T23:07:46+00:00</published>
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<entry>
<title>SplitKit: Take register class directly from instruction definition (#129727)</title>
<updated>2025-03-06T13:06:35+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-03-06T13:06:35+00:00</published>
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<content type='text'>
This fixes an expensive chesk failure after 8476a5d480304. The issue
was essentially that getRegClassConstraintEffectForVReg was not doing
anything useful, sometimes. If the register passed to it is not present
in the instruction, it is a no-op and returns the original classe. The
Edit-&gt;getReg() register may not be the register as it appears in either
the use or def instruction. It may be some split register, so take
the register directly from the instruction being rematerialized.

Also directly query the constraint from the def instruction, with a
hardcoded operand index. This isn't ideal, but all the other
rematerialize
code makes the same assumption.

So far I've been unable to reproduce this with a standalone MIR test. In
the
original case, stop-before=greedy and running the one pass is not
working.</content>
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This fixes an expensive chesk failure after 8476a5d480304. The issue
was essentially that getRegClassConstraintEffectForVReg was not doing
anything useful, sometimes. If the register passed to it is not present
in the instruction, it is a no-op and returns the original classe. The
Edit-&gt;getReg() register may not be the register as it appears in either
the use or def instruction. It may be some split register, so take
the register directly from the instruction being rematerialized.

Also directly query the constraint from the def instruction, with a
hardcoded operand index. This isn't ideal, but all the other
rematerialize
code makes the same assumption.

So far I've been unable to reproduce this with a standalone MIR test. In
the
original case, stop-before=greedy and running the one pass is not
working.</pre>
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</entry>
<entry>
<title>SplitKit: Fix rematerialization undoing subclass based split (#122110)</title>
<updated>2025-03-04T03:04:14+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-03-04T03:04:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8476a5d480304bf7bd934c660a159e1c6906a69d'/>
<id>8476a5d480304bf7bd934c660a159e1c6906a69d</id>
<content type='text'>
This fixes an allocation failure in the new test.

In cases where getLargestLegalSuperClass can inflate the register class,
rematerialization could effectively undo a split which was done to
inflate
the register class, if the defining instruction can only write a
subclass
and the use can read the superclass.

Some of the x86 tests changes look like improvements, but some are
likely regressions.

I'm not entirely sure this is the correct place to fix this. It also
seems more complicated than necessary, but the decision to change
the register class is far removed from the point where the decision
to split the virtual register is made. I'm also also not sure if this
should be considering the register classes of all the use indexes
in getUseSlots, rather than just checking if this use index instruction
reads the register.</content>
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<pre>
This fixes an allocation failure in the new test.

In cases where getLargestLegalSuperClass can inflate the register class,
rematerialization could effectively undo a split which was done to
inflate
the register class, if the defining instruction can only write a
subclass
and the use can read the superclass.

Some of the x86 tests changes look like improvements, but some are
likely regressions.

I'm not entirely sure this is the correct place to fix this. It also
seems more complicated than necessary, but the decision to change
the register class is far removed from the point where the decision
to split the virtual register is made. I'm also also not sure if this
should be considering the register classes of all the use indexes
in getUseSlots, rather than just checking if this use index instruction
reads the register.</pre>
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</entry>
<entry>
<title>[CodeGen] Use MCRegister and Register. NFC</title>
<updated>2025-03-03T06:33:26+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-03-03T03:45:21+00:00</published>
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<pre>
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</entry>
<entry>
<title>[CodeGen] Remove unused argument from getCoveringSubRegIndexes. NFC. (#122884)</title>
<updated>2025-01-14T12:59:31+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2025-01-14T12:59:31+00:00</published>
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<pre>
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<entry>
<title>[CodeGen] Remove unused includes (NFC) (#115996)</title>
<updated>2024-11-13T07:15:06+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-13T07:15:06+00:00</published>
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Identified with misc-include-cleaner.</content>
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Identified with misc-include-cleaner.</pre>
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