<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm-project.git/llvm/lib/CodeGen/MachineScheduler.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[CodeGen] Use std::tie to implement a comparison functor (NFC) (#146252)</title>
<updated>2025-06-29T15:25:53+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-06-29T15:25:53+00:00</published>
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<id>43ab5bb92115c8fd02e5da030a13b4ae1f83cb0a</id>
<content type='text'>
std::tie clearly expresses the intent while slightly shortening the
code.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
std::tie clearly expresses the intent while slightly shortening the
code.</pre>
</div>
</content>
</entry>
<entry>
<title>MachineScheduler: Improve instruction clustering (#137784)</title>
<updated>2025-06-05T07:28:04+00:00</updated>
<author>
<name>Ruiling, Song</name>
<email>ruiling.song@amd.com</email>
</author>
<published>2025-06-05T07:28:04+00:00</published>
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<id>0487db1f130913d4fad18483e305b843636ec4ce</id>
<content type='text'>
The existing way of managing clustered nodes was done through adding
weak edges between the neighbouring cluster nodes, which is a sort of
ordered queue. And this will be later recorded as `NextClusterPred` or
`NextClusterSucc` in `ScheduleDAGMI`.

But actually the instruction may be picked not in the exact order of the
queue. For example, we have a queue of cluster nodes A B C. But during
scheduling, node B might be picked first, then it will be very likely
that we only cluster B and C for Top-Down scheduling (leaving A alone).

Another issue is:
```
   if (!ReorderWhileClustering &amp;&amp; SUa-&gt;NodeNum &gt; SUb-&gt;NodeNum)
      std::swap(SUa, SUb);
   if (!DAG-&gt;addEdge(SUb, SDep(SUa, SDep::Cluster)))
```
may break the cluster queue.

For example, we want to cluster nodes (order as in `MemOpRecords`): 1 3
2. 1(SUa) will be pred of 3(SUb) normally. But when it comes to (3, 2),
As 3(SUa) &gt; 2(SUb), we would reorder the two nodes, which makes 2 be
pred of 3. This makes both 1 and 2 become preds of 3, but there is no
edge between 1 and 2. Thus we get a broken cluster chain.

To fix both issues, we introduce an unordered set in the change. This
could help improve clustering in some hard case.

One key reason the change causes so many test check changes is: As the
cluster candidates are not ordered now, the candidates might be picked
in different order from before.

The most affected targets are: AMDGPU, AArch64, RISCV.

For RISCV, it seems to me most are just minor instruction reorder, don't
see obvious regression.

For AArch64, there were some combining of ldr into ldp being affected.
With two cases being regressed and two being improved. This has more
deeper reason that machine scheduler cannot cluster them well both
before and after the change, and the load combine algorithm later is
also not smart enough.

For AMDGPU, some cases have more v_dual instructions used while some are
regressed. It seems less critical. Seems like test `v_vselect_v32bf16`
gets more buffer_load being claused.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The existing way of managing clustered nodes was done through adding
weak edges between the neighbouring cluster nodes, which is a sort of
ordered queue. And this will be later recorded as `NextClusterPred` or
`NextClusterSucc` in `ScheduleDAGMI`.

But actually the instruction may be picked not in the exact order of the
queue. For example, we have a queue of cluster nodes A B C. But during
scheduling, node B might be picked first, then it will be very likely
that we only cluster B and C for Top-Down scheduling (leaving A alone).

Another issue is:
```
   if (!ReorderWhileClustering &amp;&amp; SUa-&gt;NodeNum &gt; SUb-&gt;NodeNum)
      std::swap(SUa, SUb);
   if (!DAG-&gt;addEdge(SUb, SDep(SUa, SDep::Cluster)))
```
may break the cluster queue.

For example, we want to cluster nodes (order as in `MemOpRecords`): 1 3
2. 1(SUa) will be pred of 3(SUb) normally. But when it comes to (3, 2),
As 3(SUa) &gt; 2(SUb), we would reorder the two nodes, which makes 2 be
pred of 3. This makes both 1 and 2 become preds of 3, but there is no
edge between 1 and 2. Thus we get a broken cluster chain.

To fix both issues, we introduce an unordered set in the change. This
could help improve clustering in some hard case.

One key reason the change causes so many test check changes is: As the
cluster candidates are not ordered now, the candidates might be picked
in different order from before.

The most affected targets are: AMDGPU, AArch64, RISCV.

For RISCV, it seems to me most are just minor instruction reorder, don't
see obvious regression.

For AArch64, there were some combining of ldr into ldp being affected.
With two cases being regressed and two being improved. This has more
deeper reason that machine scheduler cannot cluster them well both
before and after the change, and the load combine algorithm later is
also not smart enough.

For AMDGPU, some cases have more v_dual instructions used while some are
regressed. It seems less critical. Seems like test `v_vselect_v32bf16`
gets more buffer_load being claused.</pre>
</div>
</content>
</entry>
<entry>
<title>[MISched] Add templates for creating custom schedulers (#141935)</title>
<updated>2025-06-03T03:37:40+00:00</updated>
<author>
<name>Pengcheng Wang</name>
<email>wangpengcheng.pp@bytedance.com</email>
</author>
<published>2025-06-03T03:37:40+00:00</published>
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<id>f393986b53b108457529213c1559346fdb8120ae</id>
<content type='text'>
We rename `createGenericSchedLive` and `createGenericSchedPostRA`
to `createSchedLive` and `createSchedPostRA`, and add a template
parameter `Strategy` which is the generic implementation by default.

This can simplify some code for targets that have custom scheduler
strategy.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We rename `createGenericSchedLive` and `createGenericSchedPostRA`
to `createSchedLive` and `createSchedPostRA`, and add a template
parameter `Strategy` which is the generic implementation by default.

This can simplify some code for targets that have custom scheduler
strategy.</pre>
</div>
</content>
</entry>
<entry>
<title>MachineScheduler: Reset next cluster candidate for each node (#139513)</title>
<updated>2025-05-28T06:53:46+00:00</updated>
<author>
<name>Ruiling, Song</name>
<email>ruiling.song@amd.com</email>
</author>
<published>2025-05-28T06:53:46+00:00</published>
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<id>3e47d8debad01801dcc2128001f2f1465c29b748</id>
<content type='text'>
When a node is picked, we should reset its next cluster candidate to
null before releasing its successors/predecessors.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When a node is picked, we should reset its next cluster candidate to
null before releasing its successors/predecessors.</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] Use llvm::is_sorted (NFC) (#140399)</title>
<updated>2025-05-17T21:29:35+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-05-17T21:29:35+00:00</published>
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<id>d1cd68881ad41bbaa81c49e54d5f1cb2b0fec093</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[MISched] Add statistics for heuristics (#137981)</title>
<updated>2025-05-09T09:06:35+00:00</updated>
<author>
<name>Cullen Rhodes</name>
<email>cullen.rhodes@arm.com</email>
</author>
<published>2025-05-09T09:06:35+00:00</published>
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<id>cdde6a650a0773e672c81b61aa53d9af2c92d2b2</id>
<content type='text'>
When diagnosing scheduling issues it can be useful to know which
heuristics are driving the scheduler. This adds pre-RA and post-RA
statistics for all heuristics.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When diagnosing scheduling issues it can be useful to know which
heuristics are driving the scheduler. This adds pre-RA and post-RA
statistics for all heuristics.</pre>
</div>
</content>
</entry>
<entry>
<title>[MISched] Add statistics to quantify scheduling (#138090)</title>
<updated>2025-05-07T06:47:16+00:00</updated>
<author>
<name>Cullen Rhodes</name>
<email>cullen.rhodes@arm.com</email>
</author>
<published>2025-05-07T06:47:16+00:00</published>
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<id>ddfdecbd00d2e9ac9b710c33ec9a7a1a6e4498ce</id>
<content type='text'>
When diagnosing scheduler issues it can be useful to know how scheduling
changes the order of instructions, particularly for large functions when
it's not trivial to figure out from the debug output by looking at the
scheduling unit (SU) IDs.

This adds pre-RA and post-RA statistics to track 1) the number of
instructions that remain in source order after scheduling and 2) the
total number of instructions scheduled, to compare 1) against.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When diagnosing scheduler issues it can be useful to know how scheduling
changes the order of instructions, particularly for large functions when
it's not trivial to figure out from the debug output by looking at the
scheduling unit (SU) IDs.

This adds pre-RA and post-RA statistics to track 1) the number of
instructions that remain in source order after scheduling and 2) the
total number of instructions scheduled, to compare 1) against.</pre>
</div>
</content>
</entry>
<entry>
<title>[MISched] Fix off-by-one error in debug output with -misched-cutoff=&lt;n&gt; flag (#137988)</title>
<updated>2025-05-06T10:12:23+00:00</updated>
<author>
<name>Cullen Rhodes</name>
<email>cullen.rhodes@arm.com</email>
</author>
<published>2025-05-06T10:12:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8ea5eacea263ed5c2c4b0950a4d1d6ef863444bc'/>
<id>8ea5eacea263ed5c2c4b0950a4d1d6ef863444bc</id>
<content type='text'>
This flag instructs the scheduler to stop scheduling after N
instructions, but
in the debug output it appears as if it's scheduling N+1 instructions,
e.g.

$ llc -misched-cutoff=10 -debug-only=machine-scheduler
example.ll 2&gt;&amp;1 | grep "^Scheduling SU" | wc -l
11

as it calls pickNode before calling checkSchedLimit.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This flag instructs the scheduler to stop scheduling after N
instructions, but
in the debug output it appears as if it's scheduling N+1 instructions,
e.g.

$ llc -misched-cutoff=10 -debug-only=machine-scheduler
example.ll 2&gt;&amp;1 | grep "^Scheduling SU" | wc -l
11

as it calls pickNode before calling checkSchedLimit.</pre>
</div>
</content>
</entry>
<entry>
<title>[Analysis] Remove implicit LocationSize conversion from uint64_t (#133342)</title>
<updated>2025-04-18T14:46:31+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2025-04-18T14:46:31+00:00</published>
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<id>f2ecd86e34ed5323f2a8ec2259f11e9f5e9bb078</id>
<content type='text'>
This change removes the uint64_t constructor on LocationSize
preventing implicit conversion, and fixes up the using APIs to adapt to
the change. Note that I'm adding a couple of explicit conversion points
on routines where passing in a fixed offset as an integer seems likely
to have well understood semantics.

We had an unfortunate case which arose if you tried to pass a TypeSize
value to a parameter of LocationSize type. We'd find the implicit
conversion path through TypeSize -&gt; uint64_t -&gt; LocationSize which works
just fine for fixed values, but looses information and fails assertions
if the TypeSize was scalable. This change breaks the first link in that
implicit conversion chain since that seemed to be the easier one.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change removes the uint64_t constructor on LocationSize
preventing implicit conversion, and fixes up the using APIs to adapt to
the change. Note that I'm adding a couple of explicit conversion points
on routines where passing in a fixed offset as an integer seems likely
to have well understood semantics.

We had an unfortunate case which arose if you tried to pass a TypeSize
value to a parameter of LocationSize type. We'd find the implicit
conversion path through TypeSize -&gt; uint64_t -&gt; LocationSize which works
just fine for fixed values, but looses information and fails assertions
if the TypeSize was scalable. This change breaks the first link in that
implicit conversion chain since that seemed to be the easier one.</pre>
</div>
</content>
</entry>
<entry>
<title>[MachineScheduler] Add more debug prints w.r.t hazards and pending SUnits (#134328)</title>
<updated>2025-04-08T17:31:05+00:00</updated>
<author>
<name>Min-Yih Hsu</name>
<email>min.hsu@sifive.com</email>
</author>
<published>2025-04-08T17:31:05+00:00</published>
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<id>9bfb4b8fb194c1df5b082888abc03d095e39b6e9</id>
<content type='text'>
While we already have some detailed debug messages on the candidate
selection process -- which selects a SUnit from the Available queue, we
didn't say much about why a SUnit was _not_ moved from Pending queue to
Available queue in the first place, which is just as important as why we
scheduled a node IMHO. Therefore, I added some debug prints for this
very purpose.

I decide to print these extra messages by default (instead of being
guarded by command line like `-misched-detail-resource-booking`) because
we have been printing some of the hazard remarks, so I thought we might
as well print these new messages -- which are mostly about hazard -- by
default.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
While we already have some detailed debug messages on the candidate
selection process -- which selects a SUnit from the Available queue, we
didn't say much about why a SUnit was _not_ moved from Pending queue to
Available queue in the first place, which is just as important as why we
scheduled a node IMHO. Therefore, I added some debug prints for this
very purpose.

I decide to print these extra messages by default (instead of being
guarded by command line like `-misched-detail-resource-booking`) because
we have been printing some of the hazard remarks, so I thought we might
as well print these new messages -- which are mostly about hazard -- by
default.</pre>
</div>
</content>
</entry>
</feed>
