llvm-project.git/llvm/lib/CodeGen/MachineOperand.cpp, branch users/mingmingl-llvm/section-prefix

[AMDGPU] Add NoaliasAddrSpace to AAMDnodes (#149247)

2025-07-29T02:10:06+00:00

This is the following PR of
https://github.com/llvm/llvm-project/pull/136553 which calculate
NoaliasAddrSpace.

This PR carries the info calculated into MIR by adding it into AAMDnodes

[CodeGen][LLVM] Fix MachineOperand::print crash when TII is nullptr. (#135170)

2025-04-11T07:26:55+00:00

This crash will caused if run this testcase:
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll

When build the SDNode, precisely build the SDNode for this ir:
```ir
  call void @llvm.amdgcn.ds.gws.barrier(i32 %val, i32 0)
```
If want call the dump function of the new SDNode in the gdb environment
like this:
```gdb
  p N->dump()
```
The llvm will crash.

All of these is because calling ```dump()``` will cause the
calling```MachineMemOperand::print()```
with the argument value for the```TII``` is nullptr. 
And the llvm/lib/CodeGen/MachineOperand.cpp#L1235 is a derefrence of
TII.

Signed-off-by: fanfuqiang

[NFC][LLVM] Remove unused `TargetIntrinsicInfo` class (#126003)

2025-02-10T22:56:30+00:00

Remove `TargetIntrinsicInfo` class as its practically unused (its pure
virtual with no subclasses) and its references in the code.

[CodeGen] Remove implict conversions from Register to unsigned from MachineOperand. NFC

2025-01-26T07:12:14+00:00

[CodeGen] Use Register/MCRegister::isPhysical. NFC

2025-01-19T07:37:03+00:00

[CodeGen] Add MOTargetFlag4 to MachineMemOperand Flags (#120136)

2025-01-03T14:45:52+00:00

[CodeGen] Fix warning after #115531

2024-12-04T05:12:06+00:00

CodeGen: Don't assert when printing null GlobalAddress operands (#115531)

2024-12-04T00:15:56+00:00

[PAuthLR] Add Missing Break Statement for MachineOperand Switch Statement (#113883)

2024-10-28T09:08:48+00:00

There was a missing break, which led to an unannotated fallthrough when
merging #112171. This has caused sanitizer builds to fail.

This adds the missing break in the switch statement to ensure that the
fallthrough does not occur.

[AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (#112171)

2024-10-28T08:22:38+00:00

As part of FEAT_PAuthLR, a new DWARF Frame Instruction was introduced,
`DW_CFA_AARCH64_negate_ra_state_with_pc`. This instructs Libunwind that
the PC has been used with the signing instruction. This change includes
three commits
- Libunwind support for the newly introduced DWARF Instruction
- CodeGen Support for the DWARF Instructions
- Reversing the changes made in #96377. Due to
`DW_CFA_AARCH64_negate_ra_state_with_pc`'s requirements to be placed
immediately after the signing instruction, this would mean the CFI
Instruction location was not consistent with the generated location when
not using FEAT_PAuthLR. The commit reverses the changes and makes the
location consistent across the different branch protection options.
While this does have a code size effect, this is a negligible one.

For the ABI information, see here:
https://github.com/ARM-software/abi-aa/blob/853286c7ab66048e4b819682ce17f567b77a0291/aadwarf64/aadwarf64.rst#id23