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<title>llvm-project.git/llvm/lib/CodeGen/MachineCombiner.cpp, branch main</title>
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<entry>
<title>[CodeGen] Hide SparseSet&lt;LiveRegUnit&gt; behind a typedef (NFC) (#167898)</title>
<updated>2025-11-13T17:14:23+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2025-11-13T17:14:23+00:00</published>
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So that changing the type of the container (planned in a future patch)
is less intrusive.</content>
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So that changing the type of the container (planned in a future patch)
is less intrusive.</pre>
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</entry>
<entry>
<title>[MachineCombiner][Targets] Use Register in TII genAlternativeCodeSequence interface. NFC (#131272)</title>
<updated>2025-03-14T06:27:56+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-03-14T06:27:56+00:00</published>
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<entry>
<title>[NFC] Remove some unnecessary semicolons</title>
<updated>2024-12-16T08:48:57+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2024-12-16T08:48:57+00:00</published>
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All inside LLVM_DEBUG, some of which have been cleaned up by adding block
scopes to allow them to format more nicely.
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All inside LLVM_DEBUG, some of which have been cleaned up by adding block
scopes to allow them to format more nicely.
</pre>
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</content>
</entry>
<entry>
<title>Check hasOptSize() in shouldOptimizeForSize() (#112626)</title>
<updated>2024-10-28T16:45:03+00:00</updated>
<author>
<name>Ellis Hoag</name>
<email>ellis.sparky.hoag@gmail.com</email>
</author>
<published>2024-10-28T16:45:03+00:00</published>
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<entry>
<title>[CodeGen][NewPM] Port machine trace metrics analysis to new pass manager. (#108507)</title>
<updated>2024-10-16T07:49:55+00:00</updated>
<author>
<name>Christudasan Devadasan</name>
<email>christudasan.devadasan@amd.com</email>
</author>
<published>2024-10-16T07:49:55+00:00</published>
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<entry>
<title>[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)</title>
<updated>2024-07-09T01:11:18+00:00</updated>
<author>
<name>paperchalice</name>
<email>liujunchang97@outlook.com</email>
</author>
<published>2024-07-09T01:11:18+00:00</published>
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<id>79d0de2ac37b6b7d66720611935d1dd7fc4fbd43</id>
<content type='text'>
- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.</content>
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- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.</pre>
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</entry>
<entry>
<title>[CodeGen][NewPM] Split `MachineDominatorTree` into a concrete analysis result (#94571)</title>
<updated>2024-06-11T13:27:14+00:00</updated>
<author>
<name>paperchalice</name>
<email>liujunchang97@outlook.com</email>
</author>
<published>2024-06-11T13:27:14+00:00</published>
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<id>837dc542b1519df343e5a8f7b2718483530a4193</id>
<content type='text'>
Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.</content>
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Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.</pre>
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</content>
</entry>
<entry>
<title>[CodeGen] Make the parameter TRI required in some functions. (#85968)</title>
<updated>2024-04-24T13:24:14+00:00</updated>
<author>
<name>Xu Zhang</name>
<email>simonzgx@gmail.com</email>
</author>
<published>2024-04-24T13:24:14+00:00</published>
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Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.</content>
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Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.</pre>
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</content>
</entry>
<entry>
<title>[MachineCombiner][NFC] Split target-dependent patterns</title>
<updated>2024-04-11T04:20:27+00:00</updated>
<author>
<name>Pengcheng Wang</name>
<email>wangpengcheng.pp@bytedance.com</email>
</author>
<published>2024-04-11T04:20:27+00:00</published>
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<id>b5640369337e98e573c949080ed4a4061ec6ec9a</id>
<content type='text'>
We split target-dependent MachineCombiner patterns into their target
folder.

This makes MachineCombiner much more target-independent.

Reviewers:
davemgreen, asavonic, rotateright, RKSimon, lukel97, LuoYuanke, topperc, mshockwave, asi-sc

Reviewed By: topperc, mshockwave

Pull Request: https://github.com/llvm/llvm-project/pull/87991
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<pre>
We split target-dependent MachineCombiner patterns into their target
folder.

This makes MachineCombiner much more target-independent.

Reviewers:
davemgreen, asavonic, rotateright, RKSimon, lukel97, LuoYuanke, topperc, mshockwave, asi-sc

Reviewed By: topperc, mshockwave

Pull Request: https://github.com/llvm/llvm-project/pull/87991
</pre>
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</entry>
<entry>
<title>[MachineCombiner] Don't ignore PHI depths (#82025)</title>
<updated>2024-03-14T15:47:29+00:00</updated>
<author>
<name>Jonas Paulsson</name>
<email>paulson1@linux.ibm.com</email>
</author>
<published>2024-03-14T15:47:29+00:00</published>
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<content type='text'>
The depths of the Root and the NewRoot are to be compared in
MachineCombiner::improvesCriticalPathLen(), and while the call to
BlockTrace.getInstrCycles(*Root) includes the Depth of a PHI, for some
reason PHI nodes have been ignored in getOperandDef(). 

This patch removes the special handling of PHIs in getOperandDef() so that
Root and NewRoot get a fair comparison. This does not affect loop headers
as MachineTraceMetrics handles that case by ignoring incoming PHI edges.
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The depths of the Root and the NewRoot are to be compared in
MachineCombiner::improvesCriticalPathLen(), and while the call to
BlockTrace.getInstrCycles(*Root) includes the Depth of a PHI, for some
reason PHI nodes have been ignored in getOperandDef(). 

This patch removes the special handling of PHIs in getOperandDef() so that
Root and NewRoot get a fair comparison. This does not affect loop headers
as MachineTraceMetrics handles that case by ignoring incoming PHI edges.
</pre>
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