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<title>llvm-project.git/llvm/lib/CodeGen/MIRParser/MILexer.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[MIRLexer][RISCV] Eat a space after the Machine comment (#115365)</title>
<updated>2024-11-11T19:48:31+00:00</updated>
<author>
<name>Michael Maitland</name>
<email>michaeltmaitland@gmail.com</email>
</author>
<published>2024-11-11T19:48:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=2b58458225fb0f9cce6dabce7e4451f86c8c73a5'/>
<id>2b58458225fb0f9cce6dabce7e4451f86c8c73a5</id>
<content type='text'>
The MIRPrinter emits ` :: ` at the start of a MMO. The MIRLexer eats all
the white space after the operand and before the `::` when there is no
comment. We need to eat the space after the comment to allow MIRLexer to
parse comments on a MMO.</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The MIRPrinter emits ` :: ` at the start of a MMO. The MIRLexer eats all
the white space after the operand and before the `::` when there is no
comment. We need to eat the space after the comment to allow MIRLexer to
parse comments on a MMO.</pre>
</div>
</content>
</entry>
<entry>
<title>[GlobalISel] Import samesign flag (#114267)</title>
<updated>2024-10-30T18:56:25+00:00</updated>
<author>
<name>Thorsten Schütt</name>
<email>schuett@gmail.com</email>
</author>
<published>2024-10-30T18:56:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=b3bb6f18bb5b2b8756b585b80d46d13ab3636a18'/>
<id>b3bb6f18bb5b2b8756b585b80d46d13ab3636a18</id>
<content type='text'>
Credits: https://github.com/llvm/llvm-project/pull/111419

Fixes icmp-flags.mir

First attempt: https://github.com/llvm/llvm-project/pull/113090

Revert: https://github.com/llvm/llvm-project/pull/114256</content>
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<pre>
Credits: https://github.com/llvm/llvm-project/pull/111419

Fixes icmp-flags.mir

First attempt: https://github.com/llvm/llvm-project/pull/113090

Revert: https://github.com/llvm/llvm-project/pull/114256</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[GlobalISel] Import samesign flag" (#114256)</title>
<updated>2024-10-30T16:03:17+00:00</updated>
<author>
<name>Thorsten Schütt</name>
<email>schuett@gmail.com</email>
</author>
<published>2024-10-30T16:03:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=4b028773b2c977eb8494a39e4b3fb2f114d1e2b5'/>
<id>4b028773b2c977eb8494a39e4b3fb2f114d1e2b5</id>
<content type='text'>
Reverts llvm/llvm-project#113090</content>
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<pre>
Reverts llvm/llvm-project#113090</pre>
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</content>
</entry>
<entry>
<title>[GlobalISel] Import samesign flag (#113090)</title>
<updated>2024-10-30T15:34:01+00:00</updated>
<author>
<name>Thorsten Schütt</name>
<email>schuett@gmail.com</email>
</author>
<published>2024-10-30T15:34:01+00:00</published>
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<id>72b115301d1c0d56f40f5030bb8d16f422ac211b</id>
<content type='text'>
Credits: https://github.com/llvm/llvm-project/pull/111419</content>
<content type='xhtml'>
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<pre>
Credits: https://github.com/llvm/llvm-project/pull/111419</pre>
</div>
</content>
</entry>
<entry>
<title>[AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (#112171)</title>
<updated>2024-10-28T08:22:38+00:00</updated>
<author>
<name>Jack Styles</name>
<email>jack.styles@arm.com</email>
</author>
<published>2024-10-28T08:22:38+00:00</published>
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<id>86f76c3b171f95fd0560339f2ad0f4449277cf8d</id>
<content type='text'>
As part of FEAT_PAuthLR, a new DWARF Frame Instruction was introduced,
`DW_CFA_AARCH64_negate_ra_state_with_pc`. This instructs Libunwind that
the PC has been used with the signing instruction. This change includes
three commits
- Libunwind support for the newly introduced DWARF Instruction
- CodeGen Support for the DWARF Instructions
- Reversing the changes made in #96377. Due to
`DW_CFA_AARCH64_negate_ra_state_with_pc`'s requirements to be placed
immediately after the signing instruction, this would mean the CFI
Instruction location was not consistent with the generated location when
not using FEAT_PAuthLR. The commit reverses the changes and makes the
location consistent across the different branch protection options.
While this does have a code size effect, this is a negligible one.

For the ABI information, see here:
https://github.com/ARM-software/abi-aa/blob/853286c7ab66048e4b819682ce17f567b77a0291/aadwarf64/aadwarf64.rst#id23</content>
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<pre>
As part of FEAT_PAuthLR, a new DWARF Frame Instruction was introduced,
`DW_CFA_AARCH64_negate_ra_state_with_pc`. This instructs Libunwind that
the PC has been used with the signing instruction. This change includes
three commits
- Libunwind support for the newly introduced DWARF Instruction
- CodeGen Support for the DWARF Instructions
- Reversing the changes made in #96377. Due to
`DW_CFA_AARCH64_negate_ra_state_with_pc`'s requirements to be placed
immediately after the signing instruction, this would mean the CFI
Instruction location was not consistent with the generated location when
not using FEAT_PAuthLR. The commit reverses the changes and makes the
location consistent across the different branch protection options.
While this does have a code size effect, this is a negligible one.

For the ABI information, see here:
https://github.com/ARM-software/abi-aa/blob/853286c7ab66048e4b819682ce17f567b77a0291/aadwarf64/aadwarf64.rst#id23</pre>
</div>
</content>
</entry>
<entry>
<title>[LLVM][MIR] Support parsing bfloat immediates in MIR parser (#96010)</title>
<updated>2024-06-25T20:44:14+00:00</updated>
<author>
<name>Stephen Chou</name>
<email>stephenchouca@users.noreply.github.com</email>
</author>
<published>2024-06-25T20:44:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3c24eb39fb7e9c8b61992c86cb44d8cacc5853d2'/>
<id>3c24eb39fb7e9c8b61992c86cb44d8cacc5853d2</id>
<content type='text'>
Adds support in MIR parser for parsing bfloat immediates, and adds a
test for this.</content>
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<pre>
Adds support in MIR parser for parsing bfloat immediates, and adds a
test for this.</pre>
</div>
</content>
</entry>
<entry>
<title>[GlobalIsel] Import GEP flags (#93850)</title>
<updated>2024-06-14T18:56:43+00:00</updated>
<author>
<name>Thorsten Schütt</name>
<email>schuett@gmail.com</email>
</author>
<published>2024-06-14T18:56:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=b1f9440fa9286638bb1fe72a14d220770d1987cc'/>
<id>b1f9440fa9286638bb1fe72a14d220770d1987cc</id>
<content type='text'>
https://github.com/llvm/llvm-project/pull/90824</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
https://github.com/llvm/llvm-project/pull/90824</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen] Add nneg and disjoint flags (#86650)</title>
<updated>2024-03-26T17:44:34+00:00</updated>
<author>
<name>Thorsten Schütt</name>
<email>schuett@gmail.com</email>
</author>
<published>2024-03-26T17:44:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=da6cc4a24ff8953d51f7dc2c4974e8fc9089d693'/>
<id>da6cc4a24ff8953d51f7dc2c4974e8fc9089d693</id>
<content type='text'>
MachineInstr learned the new flags.</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
MachineInstr learned the new flags.</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)</title>
<updated>2023-12-12T05:01:36+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2023-12-12T05:01:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=586ecdf205aa8b3d162da6f955170a6736656615'/>
<id>586ecdf205aa8b3d162da6f955170a6736656615</id>
<content type='text'>
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.</content>
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<pre>
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.</pre>
</div>
</content>
</entry>
<entry>
<title>[GlobalISel] introduce MIFlag::NoConvergent</title>
<updated>2023-08-20T15:44:46+00:00</updated>
<author>
<name>Sameer Sahasrabuddhe</name>
<email>sameer.sahasrabuddhe@amd.com</email>
</author>
<published>2023-08-18T08:18:01+00:00</published>
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<id>ef38e6d97f482284262172491b6c13b1b9db95b4</id>
<content type='text'>
Some opcodes in MIR are defined to be convergent by the target by setting
IsConvergent in the corresponding TD file. For example, in AMDGPU, the opcodes
G_SI_CALL and G_INTRINSIC* are marked as convergent. But this is too
conservative, since calls to functions that do not execute convergent operations
should not be marked convergent. This information is available in LLVM IR.

The new flag MIFlag::NoConvergent now allows the IR translator to mark an
instruction as not performing any convergent operations. It is relevant only on
occurrences of opcodes that are marked isConvergent in the target.

Differential Revision: https://reviews.llvm.org/D157475
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some opcodes in MIR are defined to be convergent by the target by setting
IsConvergent in the corresponding TD file. For example, in AMDGPU, the opcodes
G_SI_CALL and G_INTRINSIC* are marked as convergent. But this is too
conservative, since calls to functions that do not execute convergent operations
should not be marked convergent. This information is available in LLVM IR.

The new flag MIFlag::NoConvergent now allows the IR translator to mark an
instruction as not performing any convergent operations. It is relevant only on
occurrences of opcodes that are marked isConvergent in the target.

Differential Revision: https://reviews.llvm.org/D157475
</pre>
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</content>
</entry>
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