llvm-project.git/llvm/lib/CodeGen/LiveRegMatrix.cpp, branch users/meinersbur/flang_runtime_split-headers

[CodeGen] LiveRegMatrix: Use allocator through a unique_ptr (#120556)

2025-01-01T09:24:08+00:00

`LIU::Matrix` holds on to a pointer to the allocator in LiveRegMatrix and is left hanging when the allocator moves with the LiveRegMatrix.

This extends the lifetime of the allocator so that it does not get destroyed when moving a LiveRegMatrix object.

[CodeGen][PM] Initialize analyses with isAnalysis=true (#118779)

2024-12-06T09:55:54+00:00

Analyses should be marked as analyses.

Otherwise they are prone to get ignored by the legacy analysis cache mechanism and get scheduled redundantly.

VirtRegRewriter: Add implicit register defs for live out undef lanes (#112679)

2024-10-29T00:33:53+00:00

If an undef subregister def is live into another block, we need to
maintain a physreg def to track the liveness of those lanes. This
would manifest a verifier error after branch folding, when the cloned
tail block use no longer had a def.

We need to detect interference with other assigned intervals to avoid
clobbering the undef lanes defined in other intervals, since the undef
def didn't count as interference. This is pretty ugly and adds a new
dependency on LiveRegMatrix, keeping it live for one more pass. It also
adds a lot of implicit operand spam (we really should have a better
representation for this).

There is a missing verifier check for this situation. Added an xfailed
test that demonstrates this. We may also be able to revert the changes
in 47d3cbcf842a036c20c3f1c74255cdfc213f41c2.

It might be better to insert an IMPLICIT_DEF before the instruction
rather than using the implicit-def operand.

Fixes #98474

[NewPM][CodeGen] Port LiveRegMatrix to NPM (#109938)

2024-10-22T09:58:04+00:00

[NewPM][CodeGen] Port VirtRegMap to NPM (#109936)

2024-10-22T09:45:56+00:00

[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)

2024-07-10T11:34:48+00:00

- Add `LiveIntervalsAnalysis`.
- Add `LiveIntervalsPrinterPass`.
- Use `LiveIntervalsWrapperPass` in legacy pass manager.
- Use `std::unique_ptr` instead of raw pointer for `LICalc`, so
destructor and default move constructor can handle it correctly.

This would be the last analysis required by `PHIElimination`.

[MC] Add MCRegisterInfo::regunits for iteration over register units

2023-06-16T02:39:50+00:00

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D152098

[nfc][regalloc] const LiveIntervals within the allocator

2022-02-03T20:35:36+00:00

Once built, LiveIntervals are immutable. This patch captures that.

Differential Revision: https://reviews.llvm.org/D118918

[regalloc] Ensure Query::collectInterferringVregs is called before interval iteration

2021-04-01T15:33:28+00:00

The main part of the patch is the change in RegAllocGreedy.cpp: Q.collectInterferringVregs()
needs to be called before iterating the interfering live ranges.

The rest of the patch offers support that is the case: instead of  clearing the query's
InterferingVRegs field, we invalidate it. The clearing happens when the live reg matrix
is invalidated (existing triggering mechanism).

Without the change in RegAllocGreedy.cpp, the compiler ices.

This patch should make it more easily discoverable by developers that
collectInterferringVregs needs to be called before iterating.

I will follow up with a subsequent patch to improve the usability and maintainability of Query.

Differential Revision: https://reviews.llvm.org/D98232

Revert "[regalloc] Ensure Query::collectInterferringVregs is called before interval iteration"

2021-03-16T19:41:26+00:00

This reverts commit d40b4911bd9aca0573752e065f29ddd9aff280e1.

This causes a large compile-time regression:
https://llvm-compile-time-tracker.com/compare.php?from=0aa637b2037d882ddf7861284169abf63f524677&to=d40b4911bd9aca0573752e065f29ddd9aff280e1&stat=instructions