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<title>llvm-project.git/llvm/lib/CodeGen/LivePhysRegs.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[LivePhysRegs] Use .asMCReg() rather than cast (NFC) (#155084)</title>
<updated>2025-08-23T10:25:16+00:00</updated>
<author>
<name>Benjamin Maxwell</name>
<email>benjamin.maxwell@arm.com</email>
</author>
<published>2025-08-23T10:25:16+00:00</published>
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<id>ee8c14be14deabace692ab51f5d5d432b0a83d58</id>
<content type='text'>
Should fix MSVC buildbots:

https://lab.llvm.org/buildbot/#/builders/197/builds/8321
https://lab.llvm.org/buildbot/#/builders/211/builds/1549</content>
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Should fix MSVC buildbots:

https://lab.llvm.org/buildbot/#/builders/197/builds/8321
https://lab.llvm.org/buildbot/#/builders/211/builds/1549</pre>
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<entry>
<title>[LivePhysRegs] Make use of `MBB.liveouts()` (semi-NFC) (#154728)</title>
<updated>2025-08-23T06:22:46+00:00</updated>
<author>
<name>Benjamin Maxwell</name>
<email>benjamin.maxwell@arm.com</email>
</author>
<published>2025-08-23T06:22:46+00:00</published>
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<content type='text'>
This is done for consistency with LiveRegUnits (see #154325). This is
technically not an NFC, as `MBB.liveouts()` excludes runtime-defined
liveins, but no users currently depend on this.</content>
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<pre>
This is done for consistency with LiveRegUnits (see #154325). This is
technically not an NFC, as `MBB.liveouts()` excludes runtime-defined
liveins, but no users currently depend on this.</pre>
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</content>
</entry>
<entry>
<title>[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE  (#133155)</title>
<updated>2025-04-03T17:22:49+00:00</updated>
<author>
<name>zhijian lin</name>
<email>zhijian@ca.ibm.com</email>
</author>
<published>2025-04-03T17:22:49+00:00</published>
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<id>1a540c3b8bcefaf6b36f261341ce55a1a24eca21</id>
<content type='text'>
ISD::ADDC, ISD::ADDE, ISD::SUBC and ISD::SUBE are being deprecated,
using ISD::UADDO_CARRY,ISD::USUBO_CARRY instead. Lowering the UADDO,
UADDO_CARRY, USUBO, USUBO_CARRY in the patch.</content>
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<pre>
ISD::ADDC, ISD::ADDE, ISD::SUBC and ISD::SUBE are being deprecated,
using ISD::UADDO_CARRY,ISD::USUBO_CARRY instead. Lowering the UADDO,
UADDO_CARRY, USUBO, USUBO_CARRY in the patch.</pre>
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</entry>
<entry>
<title>[CodeGen] Use Register::id(). NFC</title>
<updated>2025-03-06T17:08:21+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-03-06T16:56:54+00:00</published>
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<entry>
<title>[LivePhysRegs] Use MCRegister instead of MCPhysReg in interface. NFC</title>
<updated>2025-03-06T17:07:53+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-03-06T16:56:36+00:00</published>
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<entry>
<title>[FrameLowering] Use MCRegister instead of Register in CalleeSavedInfo. NFC (#128095)</title>
<updated>2025-02-21T07:44:05+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-02-21T07:44:05+00:00</published>
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<content type='text'>
Callee saved registers should always be phyiscal registers. They are
often passed directly to other functions that take MCRegister like
getMinimalPhysRegClass or TargetRegisterClass::contains.

Unfortunately, sometimes the MCRegister is compared to a Register which
gave an ambiguous comparison error when the MCRegister is on the LHS.
Adding a MCRegister==Register comparison operator created more ambiguous
comparison errors elsewhere. These cases were usually comparing against
a base or frame pointer register that is a physical register in a
Register. For those I added an explicit conversion of Register to
MCRegister to fix the error.</content>
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Callee saved registers should always be phyiscal registers. They are
often passed directly to other functions that take MCRegister like
getMinimalPhysRegClass or TargetRegisterClass::contains.

Unfortunately, sometimes the MCRegister is compared to a Register which
gave an ambiguous comparison error when the MCRegister is on the LHS.
Adding a MCRegister==Register comparison operator created more ambiguous
comparison errors elsewhere. These cases were usually comparing against
a base or frame pointer register that is a physical register in a
Register. For those I added an explicit conversion of Register to
MCRegister to fix the error.</pre>
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</entry>
<entry>
<title>[CodeGen] Use MCRegister instead of MCPhysReg in RegisterMaskPair. NFC (#123688)</title>
<updated>2025-01-21T15:04:35+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-01-21T15:04:35+00:00</published>
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<id>f5f32cef617c0796a7d980a464786949cbf21227</id>
<content type='text'>
Update some other places to avoid implicit conversions this introduces,
but I probably missed some.</content>
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Update some other places to avoid implicit conversions this introduces,
but I probably missed some.</pre>
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</entry>
<entry>
<title>[MC] Simplify uses of subregs/superregs. NFC.</title>
<updated>2023-04-18T13:14:07+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2023-04-18T13:12:14+00:00</published>
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<entry>
<title>[MC] Use subregs/superregs instead of MCSubRegIterator/MCSuperRegIterator. NFC.</title>
<updated>2023-04-18T12:29:41+00:00</updated>
<author>
<name>Jay Foad</name>
<email>jay.foad@amd.com</email>
</author>
<published>2023-04-17T20:09:19+00:00</published>
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<id>14bc3748109c73adde7350da60366149ae0d4c3a</id>
<content type='text'>
Differential Revision: https://reviews.llvm.org/D148613
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Differential Revision: https://reviews.llvm.org/D148613
</pre>
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</entry>
<entry>
<title>[llvm] Use llvm::reverse (NFC)</title>
<updated>2021-11-07T02:31:18+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2021-11-07T02:31:18+00:00</published>
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