TargetInstrInfo now directly holds a reference to TargetRegisterInfo and does not need TRI passed in anywhere.
This is a low level utility to parse the MCInstrInfo and should not depend on the state of the function.
These are the the ones where we already had a Register object being used. Some places are still using unsigned which I did not convert.
This patch can now reland after 318c69de52b6 relanded #114827. This reverts commit 1683f84d289348ba6879635c4161979204f75230.
Maybe not needed but to avoid conflicts with #117307 Without revert of this one, but reverting #117307, the regenerated init-undef.mir became empty. This reverts commit be15fd5085680cc5ed9ec4f4f2258b504cdd55db.
When enabling subreg liveness tracking for AArch64, this pass fails because it tries to get the register class for the artificial subreg `sub_32_hi` of a 64-bit GPR. It tries to create an INIT_UNDEF instruction for the top 32-bits of the 64-bit GPR, which are not directly addressable, so getSubRegisterClass() returns a nullptr, crashing this pass. It should instead just avoid trying to create the INIT_UNDEF instruction.
InitUndef should also handle early-clobber / undef conflicts in inline asm operands. Do this by iterating over all_defs() instead of defs(). The newly added ARM test was generating an "unpredictable STXP instruction, status is also a source" error prior to this change. Fixes https://github.com/llvm/llvm-project/issues/106380.
The InitUndef pass works around a register allocation issue, where undef operands can be allocated to the same register as early-clobber result operands. This may lead to ISA constraint violations, where certain input and output registers are not allowed to overlap. Originally this pass was implemented for RISCV, and then extended to ARM in #77770. I've since removed the target-specific parts of the pass in #106744 and #107885. This PR reduces the pass to use a single requiresDisjointEarlyClobberAndUndef() target hook and enables it by default. The hook is disabled for AMDGPU, because overlapping early-clobber and undef operands are known to be safe for that target, and we get significant codegen diffs otherwise. The motivating case is the one in arm64-ldxr-stxr.ll, where we were previously incorrectly allocating a stxp input and output to the same register.