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<title>llvm-project.git/llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[AArch64][GlobalISel] Legalize ptr shuffle vector to s64 (#116013)</title>
<updated>2024-11-23T17:00:51+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2024-11-23T17:00:51+00:00</published>
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<id>d3ce069572cb565da613df9828ac54f7edb2fc00</id>
<content type='text'>
This converts all ptr element shuffle vectors to s64, so that the
existing vector legalization handling can lower them as needed. This
prevents a lot of fallbacks that currently try to generate things like
`&lt;2 x ptr&gt; G_EXT`.

I'm not sure if bitcast/inttoptr/ptrtoint is intended to be necessary
for vectors of pointers, but it uses buildCast for the casts, which now
generates a ptrtoint/inttoptr.</content>
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<pre>
This converts all ptr element shuffle vectors to s64, so that the
existing vector legalization handling can lower them as needed. This
prevents a lot of fallbacks that currently try to generate things like
`&lt;2 x ptr&gt; G_EXT`.

I'm not sure if bitcast/inttoptr/ptrtoint is intended to be necessary
for vectors of pointers, but it uses buildCast for the casts, which now
generates a ptrtoint/inttoptr.</pre>
</div>
</content>
</entry>
<entry>
<title>[GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE (#114470)</title>
<updated>2024-11-01T05:10:26+00:00</updated>
<author>
<name>Thorsten Schütt</name>
<email>schuett@gmail.com</email>
</author>
<published>2024-11-01T05:10:26+00:00</published>
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<id>8e3772744d34d251fe0321ea78bb98d3543d3d7d</id>
<content type='text'>
There are patterns for:
* {nxv2s32, s32, s64},
* {nxv4s16, s16, s64},
* {nxv2s16, s16, s64}</content>
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<pre>
There are patterns for:
* {nxv2s32, s32, s64},
* {nxv4s16, s16, s64},
* {nxv2s16, s16, s64}</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE" (#114353)</title>
<updated>2024-10-31T04:41:16+00:00</updated>
<author>
<name>Thorsten Schütt</name>
<email>schuett@gmail.com</email>
</author>
<published>2024-10-31T04:41:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6effab990c5c1b4fe55fcd43004a1fd88145bb8d'/>
<id>6effab990c5c1b4fe55fcd43004a1fd88145bb8d</id>
<content type='text'>
Reverts llvm/llvm-project#114310</content>
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<pre>
Reverts llvm/llvm-project#114310</pre>
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</content>
</entry>
<entry>
<title>[GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE (#114310)</title>
<updated>2024-10-31T03:56:41+00:00</updated>
<author>
<name>Thorsten Schütt</name>
<email>schuett@gmail.com</email>
</author>
<published>2024-10-31T03:56:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6bf214b7c6d74ec581bc52a9142756a1d1df6df0'/>
<id>6bf214b7c6d74ec581bc52a9142756a1d1df6df0</id>
<content type='text'>
There are patterns for:
* {nxv2s32, s32, s64},
* {nxv4s16, s16, s64},
* {nxv2s16, s16, s64}</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There are patterns for:
* {nxv2s32, s32, s64},
* {nxv4s16, s16, s64},
* {nxv2s16, s16, s64}</pre>
</div>
</content>
</entry>
<entry>
<title>[RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (#84965)</title>
<updated>2024-07-31T23:00:15+00:00</updated>
<author>
<name>Jiahan Xie</name>
<email>88367305+jiahanxie353@users.noreply.github.com</email>
</author>
<published>2024-07-31T23:00:15+00:00</published>
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<id>a0d8fa5d3a7e05d30004dd4faeb45c1a96fd8769</id>
<content type='text'>
This patch supports legalizing load and store instruction for scalable
vectors in RISCV</content>
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<pre>
This patch supports legalizing load and store instruction for scalable
vectors in RISCV</pre>
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</content>
</entry>
<entry>
<title>Use llvm::has_single_bit&lt;uint32_t&gt; (NFC)</title>
<updated>2023-02-16T06:17:27+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2023-02-16T06:17:27+00:00</published>
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<id>7e6e636fb683a854de27f56b2da7d157a0b70f4e</id>
<content type='text'>
This patch replaces isPowerOf2_32 with llvm::has_single_bit&lt;uint32_t&gt;
where the argument is wider than uint32_t.
</content>
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<pre>
This patch replaces isPowerOf2_32 with llvm::has_single_bit&lt;uint32_t&gt;
where the argument is wider than uint32_t.
</pre>
</div>
</content>
</entry>
<entry>
<title>GlobalISel: Add memSizeNotByteSizePow2 legality helper</title>
<updated>2022-04-11T23:43:37+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2022-04-10T23:50:47+00:00</published>
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<id>d1f97a341958bb658e03bd8a01e9f19a9924d114</id>
<content type='text'>
This is really a replacement for memSizeInBytesNotPow2 that actually
does what most every target wants. In particular, since s1 rounds to 1
byte, it wasn't lowered by this predicate. This results in targets
needing to think harder and add more matchers to catch all the
degenerate cases.

Also small bug fix that prevented the correct insertion of
G_ASSERT_ZEXT in the AArch64 use case.
</content>
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<pre>
This is really a replacement for memSizeInBytesNotPow2 that actually
does what most every target wants. In particular, since s1 rounds to 1
byte, it wasn't lowered by this predicate. This results in targets
needing to think harder and add more matchers to catch all the
degenerate cases.

Also small bug fix that prevented the correct insertion of
G_ASSERT_ZEXT in the AArch64 use case.
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][GlobalISel] Legalize G_MUL for non-standard types</title>
<updated>2021-09-07T14:33:24+00:00</updated>
<author>
<name>Mirko Brkusanin</name>
<email>Mirko.Brkusanin@amd.com</email>
</author>
<published>2021-09-07T14:25:04+00:00</published>
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<id>6c4b634da6191b2fa10e833a9393115b83e768d1</id>
<content type='text'>
Legalizing G_MUL for non-standard types (like i33) generated an error. Putting
minScalar and maxScalar instead of clampScalar. Also using new rule, instead
of widening to the next power of 2, widen to the next multiple of the passed
argument (32 in this case), so instead of widening i65 to i128, we widen it to
i96.

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D109228
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Legalizing G_MUL for non-standard types (like i33) generated an error. Putting
minScalar and maxScalar instead of clampScalar. Also using new rule, instead
of widening to the next power of 2, widen to the next multiple of the passed
argument (32 in this case), so instead of widening i65 to i128, we widen it to
i96.

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D109228
</pre>
</div>
</content>
</entry>
<entry>
<title>GlobalISel: Use LLT in memory legality queries</title>
<updated>2021-06-30T21:44:13+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2021-06-09T00:22:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=28f2f66200c5719a637d857387922c91d8b12c34'/>
<id>28f2f66200c5719a637d857387922c91d8b12c34</id>
<content type='text'>
This enables proper lowering of non-byte sized loads. We still aren't
faithfully preserving memory types everywhere, so the legality checks
still only consider the size.
</content>
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<pre>
This enables proper lowering of non-byte sized loads. We still aren't
faithfully preserving memory types everywhere, so the legality checks
still only consider the size.
</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen, Transforms] Use llvm::any_of (NFC)</title>
<updated>2020-12-24T17:08:36+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2020-12-24T17:08:36+00:00</published>
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<id>df812115e3ca9741f094a8102325cb2351868b48</id>
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</content>
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<pre>
</pre>
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