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<title>llvm-project.git/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, branch users/nico/python-2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[IRTranslator] Remove unnecessary isIntrinsic() check (NFC)</title>
<updated>2025-06-23T10:43:19+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2025-06-23T09:42:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=e56384ff540e68f9d0500fa27a95354c0730e37b'/>
<id>e56384ff540e68f9d0500fa27a95354c0730e37b</id>
<content type='text'>
Directly call getIntrinsicID(), there is no need to check for
isIntrinsic() first.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Directly call getIntrinsicID(), there is no need to check for
isIntrinsic() first.
</pre>
</div>
</content>
</entry>
<entry>
<title>[LLVM][CodeGen] Add convenience accessors for MachineFunctionProperties (#140002)</title>
<updated>2025-05-22T15:07:52+00:00</updated>
<author>
<name>Rahul Joshi</name>
<email>rjoshi@nvidia.com</email>
</author>
<published>2025-05-22T15:07:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1fdf02ad5a4ca155017eea22688365a20aab077c'/>
<id>1fdf02ad5a4ca155017eea22688365a20aab077c</id>
<content type='text'>
Add per-property has&lt;Prop&gt;/set&lt;Prop&gt;/reset&lt;Prop&gt; functions to
MachineFunctionProperties.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add per-property has&lt;Prop&gt;/set&lt;Prop&gt;/reset&lt;Prop&gt; functions to
MachineFunctionProperties.</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen] Add SSID &amp; Atomic Ordering to IntrinsicInfo (#140896)</title>
<updated>2025-05-22T09:42:01+00:00</updated>
<author>
<name>Pierre van Houtryve</name>
<email>pierre.vanhoutryve@amd.com</email>
</author>
<published>2025-05-22T09:42:01+00:00</published>
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<id>b5e2a236b9b31243c93d489ccee7b78aacda565a</id>
<content type='text'>
getTgtMemIntrinsic should be able to propagate such information to the
MMO</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
getTgtMemIntrinsic should be able to propagate such information to the
MMO</pre>
</div>
</content>
</entry>
<entry>
<title>GlobalISel: Translate minimumnum and maximumnum (#139106)</title>
<updated>2025-05-08T18:03:34+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-05-08T18:03:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=8c61befff8e8687e7848fb1044beb20b41503451'/>
<id>8c61befff8e8687e7848fb1044beb20b41503451</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[IntrinsicInst] Remove MemCpyInlineInst and MemSetInlineInst [nfc] (#138568)</title>
<updated>2025-05-05T21:07:31+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2025-05-05T21:07:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c0a264e6a905b1b97755ca9bb1ac82790e0e3d1b'/>
<id>c0a264e6a905b1b97755ca9bb1ac82790e0e3d1b</id>
<content type='text'>
I'm looking for ways to simplify the Mem*Inst class structure, and these
two seem to have fairly minimal justification, so let's remove them.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
I'm looking for ways to simplify the Mem*Inst class structure, and these
two seem to have fairly minimal justification, so let's remove them.</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen] Use range-based for loops (NFC) (#138488)</title>
<updated>2025-05-05T17:08:49+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-05-05T17:08:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=cdc9a4b5f81a2bc41b6452585a77f681deb4c53c'/>
<id>cdc9a4b5f81a2bc41b6452585a77f681deb4c53c</id>
<content type='text'>
This is a reland of #138434 except that:

- the bits for llvm/lib/CodeGen/RenameIndependentSubregs.cpp
  have been dropped because they caused a test failure under asan, and

- the bits for llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp have
  been improved with structured bindings.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a reland of #138434 except that:

- the bits for llvm/lib/CodeGen/RenameIndependentSubregs.cpp
  have been dropped because they caused a test failure under asan, and

- the bits for llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp have
  been improved with structured bindings.</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[CodeGen] Use range-based for loops (NFC) (#138434)"</title>
<updated>2025-05-04T21:36:52+00:00</updated>
<author>
<name>Nico Weber</name>
<email>thakis@chromium.org</email>
</author>
<published>2025-05-04T21:36:08+00:00</published>
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<id>1d955489c3c2fc2da89826a5cd6bf7954cf133b7</id>
<content type='text'>
This reverts commit a9699a334bc9666570418a3bed9520bcdc21518b.

Breaks CodeGen/AMDGPU/collapse-endcf.ll in several configs
(sanitizer builds; macOS; possibly more), see comments on
https://github.com/llvm/llvm-project/pull/138434
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit a9699a334bc9666570418a3bed9520bcdc21518b.

Breaks CodeGen/AMDGPU/collapse-endcf.ll in several configs
(sanitizer builds; macOS; possibly more), see comments on
https://github.com/llvm/llvm-project/pull/138434
</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen] Use range-based for loops (NFC) (#138434)</title>
<updated>2025-05-04T07:26:19+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-05-04T07:26:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a9699a334bc9666570418a3bed9520bcdc21518b'/>
<id>a9699a334bc9666570418a3bed9520bcdc21518b</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] Remove redundant control flow (NFC) (#138304)</title>
<updated>2025-05-02T17:34:25+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-05-02T17:34:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=aa613777af4a2f2d5103e5e67da96f41ca2bb19e'/>
<id>aa613777af4a2f2d5103e5e67da96f41ca2bb19e</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>Reland [llvm] Add support for llvm IR atomicrmw fminimum/fmaximum instructions (#137701)</title>
<updated>2025-04-30T21:06:37+00:00</updated>
<author>
<name>Jonathan Thackray</name>
<email>jonathan.thackray@arm.com</email>
</author>
<published>2025-04-30T21:06:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6e49f73825f1b9cb98352a7c8dca3e0cf83ebd9e'/>
<id>6e49f73825f1b9cb98352a7c8dca3e0cf83ebd9e</id>
<content type='text'>
This patch adds support for LLVM IR atomicrmw `fmaximum` and `fminimum`
instructions.

These mirror the `llvm.maximum.*` and `llvm.minimum.*` instructions, but
are atomic and use IEEE754 2019 handling for NaNs, which is different to
`fmax` and `fmin`. See:
     https://llvm.org/docs/LangRef.html#llvm-minimum-intrinsic
for more details.

Future changes will allow this LLVM IR to be lowered to specialised
assembler instructions on suitable targets, such as AArch64.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for LLVM IR atomicrmw `fmaximum` and `fminimum`
instructions.

These mirror the `llvm.maximum.*` and `llvm.minimum.*` instructions, but
are atomic and use IEEE754 2019 handling for NaNs, which is different to
`fmax` and `fmin`. See:
     https://llvm.org/docs/LangRef.html#llvm-minimum-intrinsic
for more details.

Future changes will allow this LLVM IR to be lowered to specialised
assembler instructions on suitable targets, such as AArch64.</pre>
</div>
</content>
</entry>
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