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<title>llvm-project.git/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[CodeGen] Delete two ComputeValueVTs overloads (NFC) (#166758)</title>
<updated>2025-11-06T16:45:29+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2025-11-06T16:45:29+00:00</published>
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<id>71927ddb63ac095c29a3b336097a846fb5b389ad</id>
<content type='text'>
Those have only a few uses.</content>
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<pre>
Those have only a few uses.</pre>
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</entry>
<entry>
<title>[AArch64][GlobalISel] Fix passing &lt;3 x ptr&gt; via the stack. (#157247)</title>
<updated>2025-09-08T06:57:46+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2025-09-08T06:57:46+00:00</published>
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<id>2308d7bd7744fa7645b182ac8b5b6e1a8b65e65d</id>
<content type='text'>
A &lt;3 x ptr&gt; will become a &lt;1 x ptr&gt; after being split, which needs to be
represented as a s64 in a LLT.</content>
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<pre>
A &lt;3 x ptr&gt; will become a &lt;1 x ptr&gt; after being split, which needs to be
represented as a s64 in a LLT.</pre>
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</content>
</entry>
<entry>
<title>[CodeGen] Provide original IR type to CC lowering (NFC) (#152709)</title>
<updated>2025-08-11T06:57:53+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2025-08-11T06:57:53+00:00</published>
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<content type='text'>
It is common to have ABI requirements for illegal types: For example,
two i64 argument parts that originally came from an fp128 argument may
have a different call ABI than ones that came from a i128 argument.

The current calling convention lowering does not provide access to this
information, so backends come up with various hacks to support it (like
additional pre-analysis cached in CCState, or bypassing the default
logic entirely).

This PR adds the original IR type to InputArg/OutputArg and passes it
down to CCAssignFn. It is not actually used anywhere yet, this just does
the mechanical changes to thread through the new argument.</content>
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<pre>
It is common to have ABI requirements for illegal types: For example,
two i64 argument parts that originally came from an fp128 argument may
have a different call ABI than ones that came from a i128 argument.

The current calling convention lowering does not provide access to this
information, so backends come up with various hacks to support it (like
additional pre-analysis cached in CCState, or bypassing the default
logic entirely).

This PR adds the original IR type to InputArg/OutputArg and passes it
down to CCAssignFn. It is not actually used anywhere yet, this just does
the mechanical changes to thread through the new argument.</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen] Move IsFixed into ArgFlags (NFCI) (#152319)</title>
<updated>2025-08-07T07:12:40+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2025-08-07T07:12:40+00:00</published>
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<id>406d9b1dd6522cf18e61c4c4af66db765de8afed</id>
<content type='text'>
The information whether a specific argument is vararg or fixed is
currently stored separately from all the other argument information in
ArgFlags. This means that it is not accessible from CCAssign, and
backends have developed all kinds of workarounds for how they can access
it after all.

Move this information to ArgFlags to make it directly available in all
relevant places.

I've opted to invert this and store it as IsVarArg, as I think that both
makes the meaning more obvious and provides for a better default (which
is IsVarArg=false).</content>
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<pre>
The information whether a specific argument is vararg or fixed is
currently stored separately from all the other argument information in
ArgFlags. This means that it is not accessible from CCAssign, and
backends have developed all kinds of workarounds for how they can access
it after all.

Move this information to ArgFlags to make it directly available in all
relevant places.

I've opted to invert this and store it as IsVarArg, as I think that both
makes the meaning more obvious and provides for a better default (which
is IsVarArg=false).</pre>
</div>
</content>
</entry>
<entry>
<title>[GISel] Introduce MachineIRBuilder::(build|materialize)ObjectPtrOffset (#150392)</title>
<updated>2025-07-29T11:04:04+00:00</updated>
<author>
<name>Fabian Ritter</name>
<email>fabian.ritter@amd.com</email>
</author>
<published>2025-07-29T11:04:04+00:00</published>
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<id>d64240b5c69e0a36fd86605812860c9f1116f8c9</id>
<content type='text'>
These functions are for building G_PTR_ADDs when we know that the base
pointer and the result are both valid pointers into (or just after) the
same object. They are similar to SelectionDAG::getObjectPtrOffset.

This PR also changes call sites of the generic (build|materialize)PtrAdd
functions that implement pointer arithmetic to split large memory
accesses to the new functions. Since memory accesses have to fit into an
object in memory, pointer arithmetic to an offset into a large memory
access also yields an address in that object.

Currently, these (build|materialize)ObjectPtrOffset functions only add
"nuw" to the generated G_PTR_ADD, but I intend to introduce an
"inbounds" MIFlag in a later PR (analogous to a concurrent effort in
SDAG: #131862, related: #140017, #141725) that will also be set in the
(build|materialize)ObjectPtrOffset functions.

Most test changes just add "nuw" to G_PTR_ADDs. Exceptions are AMDGPU's
call-outgoing-stack-args.ll, flat-scratch.ll, and freeze.ll tests, where
offsets are now folded into scratch instructions, and cases where the
behavior of the check regeneration script changed, resulting, e.g., in
better checks for "nusw G_PTR_ADD" instructions, matched empty lines,
and the use of "CHECK-NEXT" in MIPS tests.

For SWDEV-516125.</content>
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<pre>
These functions are for building G_PTR_ADDs when we know that the base
pointer and the result are both valid pointers into (or just after) the
same object. They are similar to SelectionDAG::getObjectPtrOffset.

This PR also changes call sites of the generic (build|materialize)PtrAdd
functions that implement pointer arithmetic to split large memory
accesses to the new functions. Since memory accesses have to fit into an
object in memory, pointer arithmetic to an offset into a large memory
access also yields an address in that object.

Currently, these (build|materialize)ObjectPtrOffset functions only add
"nuw" to the generated G_PTR_ADD, but I intend to introduce an
"inbounds" MIFlag in a later PR (analogous to a concurrent effort in
SDAG: #131862, related: #140017, #141725) that will also be set in the
(build|materialize)ObjectPtrOffset functions.

Most test changes just add "nuw" to G_PTR_ADDs. Exceptions are AMDGPU's
call-outgoing-stack-args.ll, flat-scratch.ll, and freeze.ll tests, where
offsets are now folded into scratch instructions, and cases where the
behavior of the check regeneration script changed, resulting, e.g., in
better checks for "nusw G_PTR_ADD" instructions, matched empty lines,
and the use of "CHECK-NEXT" in MIPS tests.

For SWDEV-516125.</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] Use llvm::copy (NFC) (#137470)</title>
<updated>2025-04-26T22:50:38+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-04-26T22:50:38+00:00</published>
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<id>8ba3a232d1985a75cf771f8832e911b6f8abe86b</id>
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</content>
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<pre>
</pre>
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</entry>
<entry>
<title>[GlobalISel] Use Register. NFC</title>
<updated>2025-03-03T07:46:18+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-03-03T07:02:13+00:00</published>
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<id>caa798cb1e5cc8d4d75ed2347e3f2df533367c25</id>
<content type='text'>
</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[IR] Replace of PointerType::get(Type) with opaque version (NFC) (#123617)</title>
<updated>2025-01-20T15:32:56+00:00</updated>
<author>
<name>Mats Jun Larsen</name>
<email>mats@jun.codes</email>
</author>
<published>2025-01-20T15:32:56+00:00</published>
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<id>416f1c465db62d829283f6902ef35e027e127aa7</id>
<content type='text'>
In accordance with https://github.com/llvm/llvm-project/issues/123569

In order to keep the patch at reasonable size, this PR only covers for
the llvm subproject, unittests excluded.</content>
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<pre>
In accordance with https://github.com/llvm/llvm-project/issues/123569

In order to keep the patch at reasonable size, this PR only covers for
the llvm subproject, unittests excluded.</pre>
</div>
</content>
</entry>
<entry>
<title>[TargetLowering] Return Align from getByValTypeAlignment (NFC) (#119233)</title>
<updated>2024-12-09T20:39:19+00:00</updated>
<author>
<name>Sergei Barannikov</name>
<email>barannikov88@gmail.com</email>
</author>
<published>2024-12-09T20:39:19+00:00</published>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[GlobalISel] Remove unused includes (NFC) (#115429)</title>
<updated>2024-11-09T06:28:47+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2024-11-09T06:28:47+00:00</published>
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<id>b83399eab603320d3c2998450f4ada83e7fe746c</id>
<content type='text'>
Identified with misc-include-cleaner.</content>
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Identified with misc-include-cleaner.</pre>
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</content>
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