llvm-project.git/llvm/lib/CodeGen/ExpandReductions.cpp, branch users/nico/python-2 Unnamed repository; edit this file 'description' to name the repository. [TTI][WebAssembly] Pairwise reduction expansion (#93948) 2024-07-17T08:21:52+00:00 Sam Parker sam.parker@arm.com 2024-07-17T08:21:52+00:00 d28ed29d6bd9f0389092775406fff7e6205d4d5f WebAssembly doesn't support horizontal operations nor does it have a way of expressing fast-math or reassoc flags, so runtimes are currently unable to use pairwise operations when generating code from the existing shuffle patterns. This patch allows the backend to select which, arbitary, shuffle pattern to be used per reduction intrinsic. The default behaviour is the same as the existing, which is by splitting the vector into a top and bottom half. The other pattern introduced is for a pairwise shuffle. WebAssembly enables pairwise reductions for int/fp add/sub. 
WebAssembly doesn't support horizontal operations nor does it have a way
of expressing fast-math or reassoc flags, so runtimes are currently
unable to use pairwise operations when generating code from the existing
shuffle patterns.

This patch allows the backend to select which, arbitary, shuffle pattern
to be used per reduction intrinsic. The default behaviour is the same as
the existing, which is by splitting the vector into a top and bottom
half. The other pattern introduced is for a pairwise shuffle.

WebAssembly enables pairwise reductions for int/fp add/sub.
 [Transforms][Utils] Add helpers to map between Reduction IntrinsicID and Arithmetic Instruction Opcode and MinMax IntrinsicID / RecurKind 2024-02-16T11:20:34+00:00 Simon Pilgrim llvm-dev@redking.me.uk 2024-02-16T10:36:16+00:00 2ed2a3ad90934efac12cbeb01cf73afebc01d963 Noticed on #81852 
Noticed on #81852
Update mentions of reduction intrinsics; NFC 2023-04-05T10:49:41+00:00 Sven van Haastregt sven.vanhaastregt@arm.com 2023-04-05T10:49:41+00:00 5af5ac4e3ed6ad187cf075501288e62a48560cbf The intrinsics have been out of experimental since 322d0afd875d ("[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.", 2020-10-07); update some places that still referred to them as experimental. 
The intrinsics have been out of experimental since 322d0afd875d
("[llvm][mlir] Promote the experimental reduction intrinsics to be
first class intrinsics.", 2020-10-07); update some places that still
referred to them as experimental.
[CodeGen] ExpandReductions - add reduce_and/or(<X x i1> V) -> icmp(iX bitcast(<X x i1> V)) canonicalization 2023-04-04T10:19:35+00:00 Simon Pilgrim llvm-dev@redking.me.uk 2023-04-04T10:19:30+00:00 00e3ae447150b839567906c9d2c527d7d32db46c This already exists in InstCombine but was missing from the late stage ExpandReductions pass Fixes #53419 Fixes #61923 Differential Revision: https://reviews.llvm.org/D147452 
This already exists in InstCombine but was missing from the late stage ExpandReductions pass

Fixes #53419
Fixes #61923

Differential Revision: https://reviews.llvm.org/D147452
Cleanup codegen includes 2022-03-16T07:43:00+00:00 serge-sans-paille sguelton@redhat.com 2022-03-15T09:54:19+00:00 989f1c72e0f4236ac35a35cc9998ea34bc62d5cd This is a (fixed) recommit of https://reviews.llvm.org/D121169 after: 1061034926 before: 1063332844 Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681 
This is a (fixed) recommit of https://reviews.llvm.org/D121169

after:  1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681
Revert "Cleanup codegen includes" 2022-03-10T12:59:22+00:00 Nico Weber thakis@chromium.org 2022-03-10T12:54:41+00:00 a278250b0f85949d4f98e641786e5eb2b540c6b0 This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20. Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang, and many LLVM tests, see comments on https://reviews.llvm.org/D121169 
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169
Cleanup codegen includes 2022-03-10T09:00:30+00:00 serge-sans-paille sguelton@redhat.com 2022-03-07T23:25:52+00:00 7f230feeeac8a67b335f52bd2e900a05c6098f20 after: 1061034926 before: 1063332844 Differential Revision: https://reviews.llvm.org/D121169 
after:  1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169
[ExpandReductions] fix FMF requirement for fmin/fmax 2021-02-04T18:32:08+00:00 Sanjay Patel spatel@rotateright.com 2021-02-04T18:24:31+00:00 056d31dd2a043ecc2baf22b708c8dd95f7c2df35 The upstream callers (the vectorizers) were fixed with: bbed5f2f8a04 ( D95690 ) 77adbe6a8c71 We should remove this pass entirely now that reduction legalization/lowering is expected to work just as well, but we need to confirm that the shuffle ops do not regress (for x86 in particular). This should be the last step needed to close: https://llvm.org/PR23116 
The upstream callers (the vectorizers) were fixed with:
bbed5f2f8a04 ( D95690 )
77adbe6a8c71

We should remove this pass entirely now that reduction
legalization/lowering is expected to work just as well,
but we need to confirm that the shuffle ops do not
regress (for x86 in particular).

This should be the last step needed to close:
https://llvm.org/PR23116
[Analysis] flatten enums for recurrence types 2021-01-01T17:20:16+00:00 Sanjay Patel spatel@rotateright.com 2021-01-01T17:09:02+00:00 c74e8539ff372a89d08e7bfea7323a4dc2979d22 This is almost all mechanical search-and-replace and no-functional-change-intended (NFC). Having a single enum makes it easier to match/reason about the reduction cases. The goal is to remove `Opcode` from reduction matching code in the vectorizers because that makes it harder to adapt the code to handle intrinsics. The code in RecurrenceDescriptor::AddReductionVar() is the only place that required closer inspection. It uses a RecurrenceDescriptor and a second InstDesc to sometimes overwrite part of the struct. It seem like we should be able to simplify that logic, but it's not clear exactly which cmp+sel patterns that we are trying to handle/avoid. 
This is almost all mechanical search-and-replace and
no-functional-change-intended (NFC). Having a single
enum makes it easier to match/reason about the
reduction cases.

The goal is to remove `Opcode` from reduction matching
code in the vectorizers because that makes it harder to
adapt the code to handle intrinsics.

The code in RecurrenceDescriptor::AddReductionVar() is
the only place that required closer inspection. It uses
a RecurrenceDescriptor and a second InstDesc to sometimes
overwrite part of the struct. It seem like we should be
able to simplify that logic, but it's not clear exactly
which cmp+sel patterns that we are trying to handle/avoid.
[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics. 2020-10-07T17:36:44+00:00 Amara Emerson amara@apple.com 2020-10-03T01:30:53+00:00 322d0afd875df66b36e4810a2b95c20a8f22ab9b This change renames the intrinsics to not have "experimental" in the name. The autoupgrader will handle legacy intrinsics. Relevant ML thread: http://lists.llvm.org/pipermail/llvm-dev/2020-April/140729.html Differential Revision: https://reviews.llvm.org/D88787 
This change renames the intrinsics to not have "experimental" in the name.

The autoupgrader will handle legacy intrinsics.

Relevant ML thread: http://lists.llvm.org/pipermail/llvm-dev/2020-April/140729.html

Differential Revision: https://reviews.llvm.org/D88787