llvm-project.git/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp, branch main Unnamed repository; edit this file 'description' to name the repository. [CodeGen][NPM] Port ExpandPostRAPseudos to NPM (#129509) 2025-03-04T06:19:09+00:00 Akshat Oke Akshat.Oke@amd.com 2025-03-04T06:19:09+00:00 af4ec59f8d2ec127425ed45c0ff67c51679f99ad 






[CodeGen] Move lowerCopy from expandPostRA to TII
2023-07-04T03:34:49+00:00

Yashwant Singh
Yashwant.Singh@amd.com

2023-07-04T03:34:46+00:00

7aebe4eaaa10155dc3c36196a8ce8424beefa6da

This will allow targets to lower their 'copy' instructions easily.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D152261





This will allow targets to lower their 'copy' instructions easily.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D152261







Fix uninitialized pointer members in CodeGen
2023-04-17T08:32:46+00:00

Akshay Khadse
akshayskhadse@gmail.com

2023-04-17T08:16:23+00:00

8bf7f86d7966ff835967669fb6bf23897e20b71d

This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D148303





This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D148303







[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
2023-01-13T22:38:08+00:00

Craig Topper
craig.topper@sifive.com

2023-01-13T22:38:08+00:00

e72ca520bb4806d4003ef69698089fd83a5777cb

Use isPhysical/isVirtual methods.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D141715





Use isPhysical/isVirtual methods.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D141715







[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
2022-03-16T12:25:42+00:00

Shengchen Kan
shengchen.kan@intel.com

2022-03-16T12:21:25+00:00

37b378386eefab39ef570db6172a8b8e660d7bfb












Cleanup codegen includes
2022-03-16T07:43:00+00:00

serge-sans-paille
sguelton@redhat.com

2022-03-15T09:54:19+00:00

989f1c72e0f4236ac35a35cc9998ea34bc62d5cd

This is a (fixed) recommit of https://reviews.llvm.org/D121169

after:  1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681





This is a (fixed) recommit of https://reviews.llvm.org/D121169

after:  1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681







Revert "Cleanup codegen includes"
2022-03-10T12:59:22+00:00

Nico Weber
thakis@chromium.org

2022-03-10T12:54:41+00:00

a278250b0f85949d4f98e641786e5eb2b540c6b0

This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169





This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169







Cleanup codegen includes
2022-03-10T09:00:30+00:00

serge-sans-paille
sguelton@redhat.com

2022-03-07T23:25:52+00:00

7f230feeeac8a67b335f52bd2e900a05c6098f20

after:  1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169





after:  1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169







PostRAPseudos: Don't preserve kills on some implicit copy operands
2022-01-18T18:52:04+00:00

Matt Arsenault
Matthew.Arsenault@amd.com

2022-01-12T01:15:47+00:00

984451eafcedf80ce2db70b49757860992e723dc

This fixes a verifier error I ran into at -O0. A subregister copy had
an implicit kill of an overlapping superregister, which was partially
redefined by the copy. The preserved implicit operand killed
subregisters made live earlier in the sequence. AMDGPU already uses
similar logic for whether to preserve the kill of the superregister on
the final instruction if there's overlap.





This fixes a verifier error I ran into at -O0. A subregister copy had
an implicit kill of an overlapping superregister, which was partially
redefined by the copy. The preserved implicit operand killed
subregisters made live earlier in the sequence. AMDGPU already uses
similar logic for whether to preserve the kill of the superregister on
the final instruction if there's overlap.







[llvm] Use make_early_inc_range (NFC)
2021-11-16T05:28:46+00:00

Kazu Hirata
kazu@google.com

2021-11-16T05:28:46+00:00

7f00806a6a8833d70aaa8ec43159e5668d98ac66