<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm-project.git/llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>Minor optimizations to DW_OP_LLVM_extract_bits_* (#163812)</title>
<updated>2025-10-21T10:27:54+00:00</updated>
<author>
<name>Tom Tromey</name>
<email>tromey@adacore.com</email>
</author>
<published>2025-10-21T10:27:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=889db04e2c3b1a4cbcdcc94b7c3e5b365fa2effd'/>
<id>889db04e2c3b1a4cbcdcc94b7c3e5b365fa2effd</id>
<content type='text'>
I noticed a couple more small optimization opportunities when generating
DWARF expressions from the internal
DW_OP_LLVM_extract_bits_* operations:

* DW_OP_deref can be used, rather than DW_OP_deref_size, when the deref
size is the word size.

* If the bit offset is 0 and an unsigned extraction is desired, then
sometimes the shifting can be skipped entirely, or replaced with
DW_OP_and.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
I noticed a couple more small optimization opportunities when generating
DWARF expressions from the internal
DW_OP_LLVM_extract_bits_* operations:

* DW_OP_deref can be used, rather than DW_OP_deref_size, when the deref
size is the word size.

* If the bit offset is 0 and an unsigned extraction is desired, then
sometimes the shifting can be skipped entirely, or replaced with
DW_OP_and.</pre>
</div>
</content>
</entry>
<entry>
<title>Do not emit right shift by 0 in DWARF expressions (#162738)</title>
<updated>2025-10-10T14:15:17+00:00</updated>
<author>
<name>Tom Tromey</name>
<email>tromey@adacore.com</email>
</author>
<published>2025-10-10T14:15:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=311d1138e7e736f887dadba16ffb64ee9b47b159'/>
<id>311d1138e7e736f887dadba16ffb64ee9b47b159</id>
<content type='text'>
DW_OP_LLVM_extract_bits_zext and DW_OP_LLVM_extract_bits_sext can end up
emitting "DW_OP_constu 0; DW_OP_shr" when given certain arguments.
However, a shift by zero is not useful, and so it can be omitted.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
DW_OP_LLVM_extract_bits_zext and DW_OP_LLVM_extract_bits_sext can end up
emitting "DW_OP_constu 0; DW_OP_shr" when given certain arguments.
However, a shift by zero is not useful, and so it can be omitted.</pre>
</div>
</content>
</entry>
<entry>
<title>Allow DW_OP_rot, DW_OP_neg, and DW_OP_abs in DIExpression (#160757)</title>
<updated>2025-10-03T13:36:17+00:00</updated>
<author>
<name>Tom Tromey</name>
<email>tromey@adacore.com</email>
</author>
<published>2025-10-03T13:36:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=296fddc89e23b33055ff3f7ccb55de6c47dac757'/>
<id>296fddc89e23b33055ff3f7ccb55de6c47dac757</id>
<content type='text'>
The Ada front end can emit somewhat complicated DWARF expressions for
the offset of a field. While working in this area I found that I needed
DW_OP_rot (to implement a branch-free computation -- it looked more
difficult to add support for branching); and DW_OP_neg and DW_OP_abs
(just basic functionality).</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Ada front end can emit somewhat complicated DWARF expressions for
the offset of a field. While working in this area I found that I needed
DW_OP_rot (to implement a branch-free computation -- it looked more
difficult to add support for branching); and DW_OP_neg and DW_OP_abs
(just basic functionality).</pre>
</div>
</content>
</entry>
<entry>
<title>[Debug][AArch64] Do not crash on unknown subreg register sizes. (#160442)</title>
<updated>2025-09-24T10:40:12+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2025-09-24T10:40:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=88a2f405acbf8df2809d37851c04c278890fea2f'/>
<id>88a2f405acbf8df2809d37851c04c278890fea2f</id>
<content type='text'>
The AArch64 zsub regs are scalable, so defined with a size of -1 (which
comes through as 65535). The RegisterSize is only 128, so code to try
and find overlapping regs of a z30_z31 in DwarfEmitter can crash on
trying to access out of range bits in a BitVector. Hexagon and x86 also
contain subregs with unknown sizes.

Ideally most of these would be scalable values but in the meantime add a
check that the register are small enough to overlap with the current
register size, to prevent us from crashing.

This fixes the issue reported on #153810.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The AArch64 zsub regs are scalable, so defined with a size of -1 (which
comes through as 65535). The RegisterSize is only 128, so code to try
and find overlapping regs of a z30_z31 in DwarfEmitter can crash on
trying to access out of range bits in a BitVector. Hexagon and x86 also
contain subregs with unknown sizes.

Ideally most of these would be scalable values but in the meantime add a
check that the register are small enough to overlap with the current
register size, to prevent us from crashing.

This fixes the issue reported on #153810.</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm][DebugInfo] Emit DW_OP_lit0/1 for constant boolean values (#157167)</title>
<updated>2025-09-08T09:28:21+00:00</updated>
<author>
<name>Laxman Sole</name>
<email>lsole@nvidia.com</email>
</author>
<published>2025-09-08T09:28:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c1734763ce89ba053752482682f64fd812d25a50'/>
<id>c1734763ce89ba053752482682f64fd812d25a50</id>
<content type='text'>
Backends like NVPTX use -1 to indicate `true` and 0 to indicate `false`
for boolean values. Machine instruction `#DBG_VALUE` also uses -1 to
indicate a `true` boolean constant.

However, during the DWARF generation, booleans are treated as unsigned
variables, and the debug_loc expression, like `DW_OP_lit0; DW_OP_not` is
emitted for the `true` value.

This leads to the debugger printing `255` instead of `true` for constant
boolean variables.

This change emits `DW_OP_lit1` instead of `DW_OP_lit0; DW_OP_not`.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Backends like NVPTX use -1 to indicate `true` and 0 to indicate `false`
for boolean values. Machine instruction `#DBG_VALUE` also uses -1 to
indicate a `true` boolean constant.

However, during the DWARF generation, booleans are treated as unsigned
variables, and the debug_loc expression, like `DW_OP_lit0; DW_OP_not` is
emitted for the `true` value.

This leads to the debugger printing `255` instead of `true` for constant
boolean variables.

This change emits `DW_OP_lit1` instead of `DW_OP_lit0; DW_OP_not`.</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "Emit DW_OP_lit0/1 for constant boolean values" (#156172)</title>
<updated>2025-08-30T11:44:21+00:00</updated>
<author>
<name>Michael Buch</name>
<email>michaelbuch12@gmail.com</email>
</author>
<published>2025-08-30T11:44:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=101216dfdd88a716bfe2bf734e7c94c8fe227f1d'/>
<id>101216dfdd88a716bfe2bf734e7c94c8fe227f1d</id>
<content type='text'>
Reverts llvm/llvm-project#155539

Failing on buildbots with:
```
Step 7 (test-build-stage1-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: DebugInfo/debug-bool-const-location.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/llc /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll -O3 -filetype=obj -o - | /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/llvm-dwarfdump - | /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/FileCheck /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll # RUN: at line 2
+ /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/llc /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll -O3 -filetype=obj -o -
+ /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/llvm-dwarfdump -
+ /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/FileCheck /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll
/home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll:7:10: error: CHECK: expected string not found in input
; CHECK: {{.*}} DW_OP_lit0
         ^
&lt;stdin&gt;:27:54: note: scanning from here
 [0x0000000000000018, 0x0000000000000020): DW_OP_lit1, DW_OP_stack_value
                                                     ^
&lt;stdin&gt;:28:41: note: possible intended match here
 [0x0000000000000020, 0x0000000000000034): DW_OP_reg3 X3)
                                        ^

Input file: &lt;stdin&gt;
Check file: /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll

-dump-input=help explains the following input dump.

Input was:
&lt;&lt;&lt;&lt;&lt;&lt;
           .
           .
           .
          22:  DW_AT_decl_line (5) 
          23:  DW_AT_external (true) 
          24:  
          25: 0x0000003f: DW_TAG_variable 
          26:  DW_AT_location (0x00000000:  
          27:  [0x0000000000000018, 0x0000000000000020): DW_OP_lit1, DW_OP_stack_value 
check:7'0                                                          X~~~~~~~~~~~~~~~~~~~ error: no match found
          28:  [0x0000000000000020, 0x0000000000000034): DW_OP_reg3 X3) 
check:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:7'1                                             ?                  possible intended match
          29:  DW_AT_name ("arg") 
check:7'0     ~~~~~~~~~~~~~~~~~~~~
          30:  DW_AT_decl_file ("test") 
check:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
          31:  DW_AT_decl_line (5) 
check:7'0     ~~~~~~~~~~~~~~~~~~~~~
          32:  DW_AT_type (0x0000004f "bool") 
check:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          33:  
check:7'0     ~
           .
```</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Reverts llvm/llvm-project#155539

Failing on buildbots with:
```
Step 7 (test-build-stage1-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: DebugInfo/debug-bool-const-location.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/llc /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll -O3 -filetype=obj -o - | /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/llvm-dwarfdump - | /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/FileCheck /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll # RUN: at line 2
+ /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/llc /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll -O3 -filetype=obj -o -
+ /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/llvm-dwarfdump -
+ /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/build/stage1/bin/FileCheck /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll
/home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll:7:10: error: CHECK: expected string not found in input
; CHECK: {{.*}} DW_OP_lit0
         ^
&lt;stdin&gt;:27:54: note: scanning from here
 [0x0000000000000018, 0x0000000000000020): DW_OP_lit1, DW_OP_stack_value
                                                     ^
&lt;stdin&gt;:28:41: note: possible intended match here
 [0x0000000000000020, 0x0000000000000034): DW_OP_reg3 X3)
                                        ^

Input file: &lt;stdin&gt;
Check file: /home/buildbots/llvm-external-buildbots/workers/ppc64le-lld-multistage-test/ppc64le-lld-multistage-test/llvm-project/llvm/test/DebugInfo/debug-bool-const-location.ll

-dump-input=help explains the following input dump.

Input was:
&lt;&lt;&lt;&lt;&lt;&lt;
           .
           .
           .
          22:  DW_AT_decl_line (5) 
          23:  DW_AT_external (true) 
          24:  
          25: 0x0000003f: DW_TAG_variable 
          26:  DW_AT_location (0x00000000:  
          27:  [0x0000000000000018, 0x0000000000000020): DW_OP_lit1, DW_OP_stack_value 
check:7'0                                                          X~~~~~~~~~~~~~~~~~~~ error: no match found
          28:  [0x0000000000000020, 0x0000000000000034): DW_OP_reg3 X3) 
check:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:7'1                                             ?                  possible intended match
          29:  DW_AT_name ("arg") 
check:7'0     ~~~~~~~~~~~~~~~~~~~~
          30:  DW_AT_decl_file ("test") 
check:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
          31:  DW_AT_decl_line (5) 
check:7'0     ~~~~~~~~~~~~~~~~~~~~~
          32:  DW_AT_type (0x0000004f "bool") 
check:7'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          33:  
check:7'0     ~
           .
```</pre>
</div>
</content>
</entry>
<entry>
<title>Emit DW_OP_lit0/1 for constant boolean values (#155539)</title>
<updated>2025-08-30T09:07:14+00:00</updated>
<author>
<name>Laxman Sole</name>
<email>laxmansole@gmail.com</email>
</author>
<published>2025-08-30T09:07:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=3aae4bd13dc4dd2e983b1fa11e1b8c0bf153ed14'/>
<id>3aae4bd13dc4dd2e983b1fa11e1b8c0bf153ed14</id>
<content type='text'>
Backends like NVPTX use -1 to indicate `true` and 0 to indicate `false`
for boolean values. Machine instruction `#DBG_VALUE` also uses -1 to
indicate a `true` boolean constant.

However, during the DWARF generation, booleans are treated as unsigned
variables, and the debug_loc expression, like `DW_OP_lit0; DW_OP_not` is
emitted for the `true` value.

This leads to the debugger printing `255` instead of `true` for constant
boolean variables.

This change emits `DW_OP_lit1` instead of `DW_OP_lot0; DW_OP_not`.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Backends like NVPTX use -1 to indicate `true` and 0 to indicate `false`
for boolean values. Machine instruction `#DBG_VALUE` also uses -1 to
indicate a `true` boolean constant.

However, during the DWARF generation, booleans are treated as unsigned
variables, and the debug_loc expression, like `DW_OP_lit0; DW_OP_not` is
emitted for the `true` value.

This leads to the debugger printing `255` instead of `true` for constant
boolean variables.

This change emits `DW_OP_lit1` instead of `DW_OP_lot0; DW_OP_not`.</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen][NVPTX] Add a TRI function get the Dwarf register number for a virtual register. (#129017)</title>
<updated>2025-02-27T16:07:30+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-02-27T16:07:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=4af2e36b1dcd03cae07a74038e4cd424bdac04aa'/>
<id>4af2e36b1dcd03cae07a74038e4cd424bdac04aa</id>
<content type='text'>
NVPTX needs to be able to get the Dwarf register number for a virtual
register. The interface we have for this today is on MCRegisterInfo and
take a MCRegister argument. It shouldn't be legal to convert a Register
containing a virtual register to an MCRegister.

This patch adds a getDwarfRegNumForVirtReg function that takes a
Register to TRI and splits the NVPTX override of getDwarfRegNum.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
NVPTX needs to be able to get the Dwarf register number for a virtual
register. The interface we have for this today is on MCRegisterInfo and
take a MCRegister argument. It shouldn't be legal to convert a Register
containing a virtual register to an MCRegister.

This patch adds a getDwarfRegNumForVirtReg function that takes a
Register to TRI and splits the NVPTX override of getDwarfRegNum.</pre>
</div>
</content>
</entry>
<entry>
<title>[NVPTX] add support for encoding PTX registers for DWARF (#109495)</title>
<updated>2024-09-26T18:32:43+00:00</updated>
<author>
<name>William G Hatch</name>
<email>william@hatch.uno</email>
</author>
<published>2024-09-26T18:32:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=95eb3d45f6f906a484164cd5148167f331502dda'/>
<id>95eb3d45f6f906a484164cd5148167f331502dda</id>
<content type='text'>
This patch adds support for encoding PTX registers for DWARF, using the
encoding supported by nvcc and cuda-gcc.

There are some other features still needed for proper register debugging
that this patch does not address, such as DW_AT_address_class.

This PR is stacked on: https://github.com/llvm/llvm-project/pull/109494</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for encoding PTX registers for DWARF, using the
encoding supported by nvcc and cuda-gcc.

There are some other features still needed for proper register debugging
that this patch does not address, such as DW_AT_address_class.

This PR is stacked on: https://github.com/llvm/llvm-project/pull/109494</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] use 64-bit types for result of getDwarfRegNum (NFC) (#109494)</title>
<updated>2024-09-26T18:30:06+00:00</updated>
<author>
<name>William G Hatch</name>
<email>william@hatch.uno</email>
</author>
<published>2024-09-26T18:30:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=4822e9dce3483fdec7957cea092384041c8ca013'/>
<id>4822e9dce3483fdec7957cea092384041c8ca013</id>
<content type='text'>
The register encoding used by NVPTX and cuda-gdb basically use strings
encoded as numbers. They are always within 64-bits, but typically
outside of 32-bits, since they often need at least 5 characters.

This patch changes the signature of `MCRegisterInfo::getDwarfRegNum` and
some related data structures to use 64-bit numbers to accommodate
encodings like this.

Additionally, `MCRegisterInfo::getDwarfRegNum` is marked as virtual, so
that targets with peculiar dwarf register mapping schemes (such as
NVPTX) can override its behavior.

I originally tried to do a broader switch to 64-bit types for registers,
but it caused many problems. There are various places in code generation
where registers are not just treated as 32-bit numbers, but also treat
certain bit offsets as flags. So I limited the change as much as
possible to just the output of `getDwarfRegNum`. Keeping the types used
by `DwarfLLVMRegPair` as unsigned preserves the current behaviors. The
only way to give a 64-bit output from `getDwarfRegNum` that actually
needs more than 32-bits is to override `getDwarfRegNum` and provide an
implementation that sidesteps the use of the `DwarfLLVMRegPair` maps
defined in tablegen files.

First layer of stack supporting:
https://github.com/llvm/llvm-project/pull/109495</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The register encoding used by NVPTX and cuda-gdb basically use strings
encoded as numbers. They are always within 64-bits, but typically
outside of 32-bits, since they often need at least 5 characters.

This patch changes the signature of `MCRegisterInfo::getDwarfRegNum` and
some related data structures to use 64-bit numbers to accommodate
encodings like this.

Additionally, `MCRegisterInfo::getDwarfRegNum` is marked as virtual, so
that targets with peculiar dwarf register mapping schemes (such as
NVPTX) can override its behavior.

I originally tried to do a broader switch to 64-bit types for registers,
but it caused many problems. There are various places in code generation
where registers are not just treated as 32-bit numbers, but also treat
certain bit offsets as flags. So I limited the change as much as
possible to just the output of `getDwarfRegNum`. Keeping the types used
by `DwarfLLVMRegPair` as unsigned preserves the current behaviors. The
only way to give a 64-bit output from `getDwarfRegNum` that actually
needs more than 32-bits is to override `getDwarfRegNum` and provide an
implementation that sidesteps the use of the `DwarfLLVMRegPair` maps
defined in tablegen files.

First layer of stack supporting:
https://github.com/llvm/llvm-project/pull/109495</pre>
</div>
</content>
</entry>
</feed>
