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<title>llvm-project.git/llvm/lib/Analysis/VectorUtils.cpp, branch main</title>
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<entry>
<title>[VectorUtils] Use PatternMatch in findScalarElement (NFC) (#168389)</title>
<updated>2025-11-17T16:36:42+00:00</updated>
<author>
<name>Ramkumar Ramachandra</name>
<email>ramkumar.ramachandra@codasip.com</email>
</author>
<published>2025-11-17T16:36:42+00:00</published>
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<entry>
<title>[Analysis] Remove a redundant cast (NFC) (#168184)</title>
<updated>2025-11-15T16:06:16+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-11-15T16:06:16+00:00</published>
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NumElts is alreadyof type int.

Identified with readability-redundant-casting.</content>
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NumElts is alreadyof type int.

Identified with readability-redundant-casting.</pre>
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</entry>
<entry>
<title>[LAA] Only use inbounds/nusw in isNoWrap if the GEP is dereferenced. (#161445)</title>
<updated>2025-11-04T17:08:12+00:00</updated>
<author>
<name>Florian Hahn</name>
<email>flo@fhahn.com</email>
</author>
<published>2025-11-04T17:08:12+00:00</published>
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<content type='text'>
Update isNoWrap to only use the inbounds/nusw flags from GEPs that are
guaranteed to be dereferenced on every iteration. This fixes a case
where we incorrectly determine no dependence.

I think the issue is isolated to code that evaluates the resulting
AddRec at BTC, just using it to compute the distance between accesses
should still be fine; if the access does not execute in a given
iteration, there's no dependence in that iteration. But isolating the
code is not straight-forward, so be conservative for now. The practical
impact should be very minor (only one loop changed across a corpus with
27k modules from large C/C++ workloads.

Fixes https://github.com/llvm/llvm-project/issues/160912.

PR: https://github.com/llvm/llvm-project/pull/161445</content>
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Update isNoWrap to only use the inbounds/nusw flags from GEPs that are
guaranteed to be dereferenced on every iteration. This fixes a case
where we incorrectly determine no dependence.

I think the issue is isolated to code that evaluates the resulting
AddRec at BTC, just using it to compute the distance between accesses
should still be fine; if the access does not execute in a given
iteration, there's no dependence in that iteration. But isolating the
code is not straight-forward, so be conservative for now. The practical
impact should be very minor (only one loop changed across a corpus with
27k modules from large C/C++ workloads.

Fixes https://github.com/llvm/llvm-project/issues/160912.

PR: https://github.com/llvm/llvm-project/pull/161445</pre>
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</entry>
<entry>
<title>[LoopVectorize] Generate wide active lane masks (#147535)</title>
<updated>2025-09-01T12:53:30+00:00</updated>
<author>
<name>Kerry McLaughlin</name>
<email>kerry.mclaughlin@arm.com</email>
</author>
<published>2025-09-01T12:53:30+00:00</published>
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This patch adds a new flag (-enable-wide-lane-mask) which allows
LoopVectorize to generate wider-than-VF active lane masks when it
is safe to do so (i.e. the mask is used for data and control flow).

The transform in extractFromWideActiveLaneMask creates vector
extracts from the first active lane mask in the header &amp; loop body,
modifying the active lane mask phi operands to use the extracts.

An additional operand is passed to the ActiveLaneMask instruction,
the value of which is used as a multiplier of VF when generating the
mask.
By default this is 1, and is updated to UF by
extractFromWideActiveLaneMask.

The motivation for this change is to improve interleaved loops when
SVE2.1 is available, where we can make use of the whilelo instruction
which returns a predicate pair.

This is based on a PR that was created by @momchil-velikov (#81140)
and contains tests which were added there.</content>
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This patch adds a new flag (-enable-wide-lane-mask) which allows
LoopVectorize to generate wider-than-VF active lane masks when it
is safe to do so (i.e. the mask is used for data and control flow).

The transform in extractFromWideActiveLaneMask creates vector
extracts from the first active lane mask in the header &amp; loop body,
modifying the active lane mask phi operands to use the extracts.

An additional operand is passed to the ActiveLaneMask instruction,
the value of which is used as a multiplier of VF when generating the
mask.
By default this is 1, and is updated to UF by
extractFromWideActiveLaneMask.

The motivation for this change is to improve interleaved loops when
SVE2.1 is available, where we can make use of the whilelo instruction
which returns a predicate pair.

This is based on a PR that was created by @momchil-velikov (#81140)
and contains tests which were added there.</pre>
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</content>
</entry>
<entry>
<title>Reland [VectorUtils] Trivially vectorize ldexp, [l]lround (#152476)</title>
<updated>2025-08-07T11:07:29+00:00</updated>
<author>
<name>Ramkumar Ramachandra</name>
<email>ramkumar.ramachandra@codasip.com</email>
</author>
<published>2025-08-07T11:07:29+00:00</published>
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Changes: The original patch, landed as 1336675, was reverted due to a
bug in LoopVectorize resulting in a crash. The bug has now been fixed by
95c32bf ([VPlan] Return invalid cost if any skeleton block has invalid
costs), and this reland is identical to the original patch.</content>
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Changes: The original patch, landed as 1336675, was reverted due to a
bug in LoopVectorize resulting in a crash. The bug has now been fixed by
95c32bf ([VPlan] Return invalid cost if any skeleton block has invalid
costs), and this reland is identical to the original patch.</pre>
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</content>
</entry>
<entry>
<title>Revert "[VectorUtils] Trivially vectorize ldexp, [l]lround (#145545)"</title>
<updated>2025-07-31T20:24:52+00:00</updated>
<author>
<name>Muhammad Omair Javaid</name>
<email>omair.javaid@linaro.org</email>
</author>
<published>2025-07-31T20:07:31+00:00</published>
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This reverts commit 13366759c3b9db9366659d870cc73c938422b020.

This broke various LLVM testsuite buildbots for AArch64 SVE, but the
problem got masked because relevant buildbots were already failing
due to other breakage.

It has broken llvm-test-suite test:
gfortran-regression-compile-regression__vect__pr106253_f.test

https://lab.llvm.org/buildbot/#/builders/4/builds/8164
https://lab.llvm.org/buildbot/#/builders/17/builds/9858
https://lab.llvm.org/buildbot/#/builders/41/builds/8067
https://lab.llvm.org/buildbot/#/builders/143/builds/9607
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This reverts commit 13366759c3b9db9366659d870cc73c938422b020.

This broke various LLVM testsuite buildbots for AArch64 SVE, but the
problem got masked because relevant buildbots were already failing
due to other breakage.

It has broken llvm-test-suite test:
gfortran-regression-compile-regression__vect__pr106253_f.test

https://lab.llvm.org/buildbot/#/builders/4/builds/8164
https://lab.llvm.org/buildbot/#/builders/17/builds/9858
https://lab.llvm.org/buildbot/#/builders/41/builds/8067
https://lab.llvm.org/buildbot/#/builders/143/builds/9607
</pre>
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</entry>
<entry>
<title>[VectorUtils] Simplify the code by new function InterleaveGroup::isFull. nfc (#151112)</title>
<updated>2025-07-31T08:02:53+00:00</updated>
<author>
<name>Mel Chen</name>
<email>mel.chen@sifive.com</email>
</author>
<published>2025-07-31T08:02:53+00:00</published>
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</pre>
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</entry>
<entry>
<title>[VectorUtils] Trivially vectorize ldexp, [l]lround (#145545)</title>
<updated>2025-07-29T18:23:09+00:00</updated>
<author>
<name>Ramkumar Ramachandra</name>
<email>ramkumar.ramachandra@codasip.com</email>
</author>
<published>2025-07-29T18:23:09+00:00</published>
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<entry>
<title>[IR] Add new CreateVectorInterleave interface (#150931)</title>
<updated>2025-07-29T07:47:07+00:00</updated>
<author>
<name>David Sherwood</name>
<email>david.sherwood@arm.com</email>
</author>
<published>2025-07-29T07:47:07+00:00</published>
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This PR adds a new interface to IRBuilder called CreateVectorInterleave,
which can be used to create vector.interleave intrinsics of factors 2-8.

For convenience I have also moved getInterleaveIntrinsicID and
getDeinterleaveIntrinsicID from VectorUtils.cpp to Intrinsics.cpp where
it can be used by IRBuilder.</content>
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This PR adds a new interface to IRBuilder called CreateVectorInterleave,
which can be used to create vector.interleave intrinsics of factors 2-8.

For convenience I have also moved getInterleaveIntrinsicID and
getDeinterleaveIntrinsicID from VectorUtils.cpp to Intrinsics.cpp where
it can be used by IRBuilder.</pre>
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</content>
</entry>
<entry>
<title>[IA] Relax the requirement of having ExtractValue users on deinterleave intrinsic (#148716)</title>
<updated>2025-07-16T20:46:02+00:00</updated>
<author>
<name>Min-Yih Hsu</name>
<email>min.hsu@sifive.com</email>
</author>
<published>2025-07-16T20:46:02+00:00</published>
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There are cases where InstCombine / InstSimplify might sink extractvalue
instructions that use a deinterleave intrinsic into successor blocks,
which prevents InterleavedAccess from kicking in because the current
pattern requires deinterleave intrinsic to be used by extractvalue.
However, this requirement is bit too strict while we could have just
replaced the users of deinterleave intrinsic with whatever generated by
the target TLI hooks.</content>
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There are cases where InstCombine / InstSimplify might sink extractvalue
instructions that use a deinterleave intrinsic into successor blocks,
which prevents InterleavedAccess from kicking in because the current
pattern requires deinterleave intrinsic to be used by extractvalue.
However, this requirement is bit too strict while we could have just
replaced the users of deinterleave intrinsic with whatever generated by
the target TLI hooks.</pre>
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