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<title>llvm-project.git/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst, branch users/ojhunt/ptrauth-additions</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[llvm] Proofread AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst (#163508)</title>
<updated>2025-10-15T13:54:22+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-10-15T13:54:22+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>[llvm] Proofread *.rst (#151087)</title>
<updated>2025-08-01T14:01:50+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-08-01T14:01:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=183b38078a51714bbcbeaabfa3cc84670cd575f8'/>
<id>183b38078a51714bbcbeaabfa3cc84670cd575f8</id>
<content type='text'>
This patch hyphenates words that are used as adjecives, such as:

- architecture specific
- human readable
- implementation defined
- language independent
- language specific
- machine readable
- machine specific
- target independent
- target specific</content>
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<pre>
This patch hyphenates words that are used as adjecives, such as:

- architecture specific
- human readable
- implementation defined
- language independent
- language specific
- machine readable
- machine specific
- target independent
- target specific</pre>
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</content>
</entry>
<entry>
<title>[NFC][AMDGPU] Fix stale links to ROCm repositories (#143949)</title>
<updated>2025-06-13T06:03:52+00:00</updated>
<author>
<name>Saiyedul Islam</name>
<email>Saiyedul.Islam@amd.com</email>
</author>
<published>2025-06-13T06:03:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=432d06ab919ae18c4ed1e94148448501578a6c85'/>
<id>432d06ab919ae18c4ed1e94148448501578a6c85</id>
<content type='text'>
Following GitHub organizations were merged into the ROCm org:
  * ROCm-Developer-Tools
  * RadeonOpenCompute
  * ROCmSoftwarePlatform

Ensure that all hyperlinks to the old organizations now point to the new
organization at https://github.com/ROCm.</content>
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<pre>
Following GitHub organizations were merged into the ROCm org:
  * ROCm-Developer-Tools
  * RadeonOpenCompute
  * ROCmSoftwarePlatform

Ensure that all hyperlinks to the old organizations now point to the new
organization at https://github.com/ROCm.</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][Docs] DWARF aspace-aware base types (post-review fixes)</title>
<updated>2024-09-04T22:19:25+00:00</updated>
<author>
<name>Scott Linder</name>
<email>Scott.Linder@amd.com</email>
</author>
<published>2024-09-04T22:19:11+00:00</published>
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<id>9171881d64e4834de7ad7c9807607ce6bc5167a9</id>
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</pre>
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<entry>
<title>[AMDGPU][Docs] DWARF aspace-aware base types</title>
<updated>2024-08-19T19:55:15+00:00</updated>
<author>
<name>Scott Linder</name>
<email>Scott.Linder@amd.com</email>
</author>
<published>2024-08-13T22:53:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=22825ddd88aa29994a8a260a31c959aed0b35b5b'/>
<id>22825ddd88aa29994a8a260a31c959aed0b35b5b</id>
<content type='text'>
Propose an extension to base type DIEs such that DW_ATE_address-encoded
base types can include an architecture specific address space. Use this
to implement DW_OP_convert conversions between AMDGPU address space
addresses where meaningful.
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<pre>
Propose an extension to base type DIEs such that DW_ATE_address-encoded
base types can include an architecture specific address space. Use this
to implement DW_OP_convert conversions between AMDGPU address space
addresses where meaningful.
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][NFC] Fix typo in HeterogeneousDWARF doc</title>
<updated>2024-04-24T17:38:54+00:00</updated>
<author>
<name>Scott Linder</name>
<email>Scott.Linder@amd.com</email>
</author>
<published>2024-04-24T17:36:52+00:00</published>
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</pre>
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</entry>
<entry>
<title>[AMDGPU][NFC] DWARF vector composite location description operations (#71623)</title>
<updated>2023-11-13T16:44:37+00:00</updated>
<author>
<name>Tony Tye</name>
<email>Tony.Tye@amd.com</email>
</author>
<published>2023-11-13T16:44:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=0e42df4031e8b2fec357e07ca5ca3b81adf0b5ad'/>
<id>0e42df4031e8b2fec357e07ca5ca3b81adf0b5ad</id>
<content type='text'>
Summary:
Add description to AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
for "DWARF Operations to Create Vector Composite Location Descriptions"
proposal to explain the main motivation is to facilitate more compact
DWARF that is faster to evaluate.

Reviewers: kzhuravl, scott.linder, zoran.zaric

Subscribers:</content>
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<pre>
Summary:
Add description to AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
for "DWARF Operations to Create Vector Composite Location Descriptions"
proposal to explain the main motivation is to facilitate more compact
DWARF that is faster to evaluate.

Reviewers: kzhuravl, scott.linder, zoran.zaric

Subscribers:</pre>
</div>
</content>
</entry>
<entry>
<title>[llvm] Fix typos in documentation</title>
<updated>2023-05-13T06:47:46+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2023-05-13T06:47:46+00:00</published>
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<id>96ddbd6dd85f9bc27fc3bc101411c7928a0c2756</id>
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</pre>
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</entry>
<entry>
<title>[HeterogeneousDWARF] Update encodings in AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst</title>
<updated>2023-04-19T20:40:21+00:00</updated>
<author>
<name>Scott Linder</name>
<email>Scott.Linder@amd.com</email>
</author>
<published>2023-02-23T19:53:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a4fb7f60e26c21596d74336e894b0bb1d2b4f15e'/>
<id>a4fb7f60e26c21596d74336e894b0bb1d2b4f15e</id>
<content type='text'>
Repurpose the DW_OP_LLVM_aspace_implicit_pointer encoding (0xe9) as the
encoding for a new operation DW_OP_LLVM_user which prefixes all other
new operations.

Differential Revision: https://reviews.llvm.org/D147265
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<pre>
Repurpose the DW_OP_LLVM_aspace_implicit_pointer encoding (0xe9) as the
encoding for a new operation DW_OP_LLVM_user which prefixes all other
new operations.

Differential Revision: https://reviews.llvm.org/D147265
</pre>
</div>
</content>
</entry>
<entry>
<title>[AMDGPU][NFC] Clarify heterogeneous DWARF address/memory spaces</title>
<updated>2023-01-20T21:12:06+00:00</updated>
<author>
<name>Tony Tye</name>
<email>Tony.Tye@amd.com</email>
</author>
<published>2023-01-20T18:08:19+00:00</published>
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<id>e60d1239d561ca06fa3e1995a8ac2387e216e6bc</id>
<content type='text'>
Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D142237
</content>
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<pre>
Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D142237
</pre>
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