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<title>llvm-project.git/lldb/source/Plugins/Process/Linux/NativeThreadLinux.h, branch users/mingmingl-llvm/samplefdo-profile-format</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>Reland "[lldb] Refactor CrashReason"</title>
<updated>2023-03-15T10:15:44+00:00</updated>
<author>
<name>David Spickett</name>
<email>david.spickett@linaro.org</email>
</author>
<published>2023-03-15T09:56:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6db766aa1a079085a3952f62c769cad16a1cbf3e'/>
<id>6db766aa1a079085a3952f62c769cad16a1cbf3e</id>
<content type='text'>
This reverts commit 71c4d186f1cf247f1aa45f4fd1b38f350b68d123.
The reinterpret casts were not needed.
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<pre>
This reverts commit 71c4d186f1cf247f1aa45f4fd1b38f350b68d123.
The reinterpret casts were not needed.
</pre>
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</content>
</entry>
<entry>
<title>Revert "[lldb] Refactor CrashReason"</title>
<updated>2023-03-15T09:54:47+00:00</updated>
<author>
<name>David Spickett</name>
<email>david.spickett@linaro.org</email>
</author>
<published>2023-03-15T09:54:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=71c4d186f1cf247f1aa45f4fd1b38f350b68d123'/>
<id>71c4d186f1cf247f1aa45f4fd1b38f350b68d123</id>
<content type='text'>
This reverts commit af38530ee29c285f3827e33a41edf27c9c3a6767 due
to a build failure on 32 bit.
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<pre>
This reverts commit af38530ee29c285f3827e33a41edf27c9c3a6767 due
to a build failure on 32 bit.
</pre>
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</content>
</entry>
<entry>
<title>[lldb] Refactor CrashReason</title>
<updated>2023-03-15T09:44:02+00:00</updated>
<author>
<name>David Spickett</name>
<email>david.spickett@linaro.org</email>
</author>
<published>2023-03-09T14:32:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=af38530ee29c285f3827e33a41edf27c9c3a6767'/>
<id>af38530ee29c285f3827e33a41edf27c9c3a6767</id>
<content type='text'>
So that there is only one function that NativeThreads call,
which takes a siginfo. Everything else is an internal detail.

Reviewed By: labath, JDevlieghere

Differential Revision: https://reviews.llvm.org/D146043
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<pre>
So that there is only one function that NativeThreads call,
which takes a siginfo. Everything else is an internal detail.

Reviewed By: labath, JDevlieghere

Differential Revision: https://reviews.llvm.org/D146043
</pre>
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</content>
</entry>
<entry>
<title>[lldb] [llgs] Implement qXfer:siginfo:read</title>
<updated>2022-01-13T10:24:36+00:00</updated>
<author>
<name>Michał Górny</name>
<email>mgorny@moritz.systems</email>
</author>
<published>2022-01-11T19:28:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1e74e5e9e3b903af568de834deab29fa342c665a'/>
<id>1e74e5e9e3b903af568de834deab29fa342c665a</id>
<content type='text'>
Implement the qXfer:siginfo:read that is used to read the siginfo_t
(extended signal information) for the current thread.  This is currently
implemented on FreeBSD and Linux.

Differential Revision: https://reviews.llvm.org/D117113
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<pre>
Implement the qXfer:siginfo:read that is used to read the siginfo_t
(extended signal information) for the current thread.  This is currently
implemented on FreeBSD and Linux.

Differential Revision: https://reviews.llvm.org/D117113
</pre>
</div>
</content>
</entry>
<entry>
<title>[lldb][AArch64] Annotate synchronous tag faults</title>
<updated>2021-07-29T09:26:37+00:00</updated>
<author>
<name>David Spickett</name>
<email>david.spickett@linaro.org</email>
</author>
<published>2021-04-12T14:40:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=d510b5f199d6e7a3062b5a6ea43181c4cc00a605'/>
<id>d510b5f199d6e7a3062b5a6ea43181c4cc00a605</id>
<content type='text'>
In the latest Linux kernels synchronous tag faults
include the tag bits in their address.
This change adds logical and allocation tags to the
description of synchronous tag faults.
(asynchronous faults have no address)

Process 1626 stopped
* thread #1, name = 'a.out', stop reason = signal SIGSEGV: sync tag check fault (fault address: 0x900fffff7ff9010 logical tag: 0x9 allocation tag: 0x0)

This extends the existing description and will
show as much as it can on the rare occasion something
fails.

This change supports AArch64 MTE only but other
architectures could be added by extending the
switch at the start of AnnotateSyncTagCheckFault.
The rest of the function is generic code.

Tests have been added for synchronous and asynchronous
MTE faults.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D105178
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<pre>
In the latest Linux kernels synchronous tag faults
include the tag bits in their address.
This change adds logical and allocation tags to the
description of synchronous tag faults.
(asynchronous faults have no address)

Process 1626 stopped
* thread #1, name = 'a.out', stop reason = signal SIGSEGV: sync tag check fault (fault address: 0x900fffff7ff9010 logical tag: 0x9 allocation tag: 0x0)

This extends the existing description and will
show as much as it can on the rare occasion something
fails.

This change supports AArch64 MTE only but other
architectures could be added by extending the
switch at the start of AnnotateSyncTagCheckFault.
The rest of the function is generic code.

Tests have been added for synchronous and asynchronous
MTE faults.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D105178
</pre>
</div>
</content>
</entry>
<entry>
<title>[lldb] [Process/Linux] Report fork/vfork stop reason</title>
<updated>2021-04-24T09:08:34+00:00</updated>
<author>
<name>Michał Górny</name>
<email>mgorny@moritz.systems</email>
</author>
<published>2021-04-09T15:00:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=fd0af0cf08284de79fe1a5bcfdc2dad83794dcfe'/>
<id>fd0af0cf08284de79fe1a5bcfdc2dad83794dcfe</id>
<content type='text'>
Enable reporting fork/vfork events to the server when supported.
At this moment, this is used only to test the server code, as real
client does not report fork-events and vfork-events as supported.

Differential Revision: https://reviews.llvm.org/D100208
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<pre>
Enable reporting fork/vfork events to the server when supported.
At this moment, this is used only to test the server code, as real
client does not report fork-events and vfork-events as supported.

Differential Revision: https://reviews.llvm.org/D100208
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "Revert "[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers""</title>
<updated>2021-04-01T09:07:50+00:00</updated>
<author>
<name>Muhammad Omair Javaid</name>
<email>omair.javaid@linaro.org</email>
</author>
<published>2021-03-31T18:01:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=88a5b35d63f927db69ec953ff487a7ba2504a610'/>
<id>88a5b35d63f927db69ec953ff487a7ba2504a610</id>
<content type='text'>
This reverts commit 71b648f7158c7a0b4918eaa3e94d307e4bbfce97.

There was a typo in the last commit which was causing LLDB AArch64 Linux
buildbot testsuite failures. Now fixed in current version.
</content>
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<pre>
This reverts commit 71b648f7158c7a0b4918eaa3e94d307e4bbfce97.

There was a typo in the last commit which was causing LLDB AArch64 Linux
buildbot testsuite failures. Now fixed in current version.
</pre>
</div>
</content>
</entry>
<entry>
<title>Revert "[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers"</title>
<updated>2021-03-31T12:12:14+00:00</updated>
<author>
<name>Muhammad Omair Javaid</name>
<email>omair.javaid@linaro.org</email>
</author>
<published>2021-03-31T12:10:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=71b648f7158c7a0b4918eaa3e94d307e4bbfce97'/>
<id>71b648f7158c7a0b4918eaa3e94d307e4bbfce97</id>
<content type='text'>
This reverts commit 1164b4e2957290e814c3dd781a68e504dd39148e.

Reason: LLDB AArch64 Linux buildbot failure
</content>
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<pre>
This reverts commit 1164b4e2957290e814c3dd781a68e504dd39148e.

Reason: LLDB AArch64 Linux buildbot failure
</pre>
</div>
</content>
</entry>
<entry>
<title>[trace][intel-pt] Implement trace start and trace stop</title>
<updated>2021-03-31T00:31:37+00:00</updated>
<author>
<name>Walter Erquinigo</name>
<email>a20012251@gmail.com</email>
</author>
<published>2020-11-09T21:36:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=0b69756110db444282c40ea16929186b2910c3b1'/>
<id>0b69756110db444282c40ea16929186b2910c3b1</id>
<content type='text'>
This implements the interactive trace start and stop methods.

This diff ended up being much larger than I anticipated because, by doing it, I found that I had implemented in the beginning many things in a non optimal way. In any case, the code is much better now.

There's a lot of boilerplate code due to the gdb-remote protocol, but the main changes are:

- New tracing packets: jLLDBTraceStop, jLLDBTraceStart, jLLDBTraceGetBinaryData. The gdb-remote packet definitions are quite comprehensive.
- Implementation of the "process trace start|stop" and "thread trace start|stop" commands.
- Implementaiton of an API in Trace.h to interact with live traces.
- Created an IntelPTDecoder for live threads, that use the debugger's stop id as checkpoint for its internal cache.
- Added a functionality to stop the process in case "process tracing" is enabled and a new thread can't traced.
- Added tests

I have some ideas to unify the code paths for post mortem and live threads, but I'll do that in another diff.

Differential Revision: https://reviews.llvm.org/D91679
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<pre>
This implements the interactive trace start and stop methods.

This diff ended up being much larger than I anticipated because, by doing it, I found that I had implemented in the beginning many things in a non optimal way. In any case, the code is much better now.

There's a lot of boilerplate code due to the gdb-remote protocol, but the main changes are:

- New tracing packets: jLLDBTraceStop, jLLDBTraceStart, jLLDBTraceGetBinaryData. The gdb-remote packet definitions are quite comprehensive.
- Implementation of the "process trace start|stop" and "thread trace start|stop" commands.
- Implementaiton of an API in Trace.h to interact with live traces.
- Created an IntelPTDecoder for live threads, that use the debugger's stop id as checkpoint for its internal cache.
- Added a functionality to stop the process in case "process tracing" is enabled and a new thread can't traced.
- Added tests

I have some ideas to unify the code paths for post mortem and live threads, but I'll do that in another diff.

Differential Revision: https://reviews.llvm.org/D91679
</pre>
</div>
</content>
</entry>
<entry>
<title>[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers</title>
<updated>2021-03-30T23:39:00+00:00</updated>
<author>
<name>Muhammad Omair Javaid</name>
<email>omair.javaid@linaro.org</email>
</author>
<published>2021-03-30T10:39:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1164b4e2957290e814c3dd781a68e504dd39148e'/>
<id>1164b4e2957290e814c3dd781a68e504dd39148e</id>
<content type='text'>
This patch adds two new dynamic register sets for AArch64 MTE and
Pointer Authentication features. These register sets are dynamic and
will only be available if underlying hardware support either of these
features. LLDB will pull in Aux vector information and create register
infos based on that information.

A follow up patch will add a test case to test these feature registers.

Reviewed By: labath, DavidSpickett

Differential Revision: https://reviews.llvm.org/D96460
</content>
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<pre>
This patch adds two new dynamic register sets for AArch64 MTE and
Pointer Authentication features. These register sets are dynamic and
will only be available if underlying hardware support either of these
features. LLDB will pull in Aux vector information and create register
infos based on that information.

A follow up patch will add a test case to test these feature registers.

Reviewed By: labath, DavidSpickett

Differential Revision: https://reviews.llvm.org/D96460
</pre>
</div>
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</entry>
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