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<title>llvm-project.git/clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl, branch main</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>[AMDGPU] Adding instruction specific features (#167809)</title>
<updated>2025-11-19T03:06:00+00:00</updated>
<author>
<name>Shoreshen</name>
<email>372660931@qq.com</email>
</author>
<published>2025-11-19T03:06:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=52a58a4193935f60df70eb45f8ec7c61f142ac3b'/>
<id>52a58a4193935f60df70eb45f8ec7c61f142ac3b</id>
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<pre>
</pre>
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</entry>
<entry>
<title>[clang][CodeGen] Emit `llvm.tbaa.errno` metadata during module creation</title>
<updated>2025-10-21T09:38:45+00:00</updated>
<author>
<name>Antonio Frighetto</name>
<email>me@antoniofrighetto.com</email>
</author>
<published>2025-10-21T09:38:45+00:00</published>
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<id>efcda547945e1c079a016a2184fde5b3153e4621</id>
<content type='text'>
Let Clang emit `llvm.tbaa.errno` metadata in order to let LLVM
carry out optimizations around errno-writing libcalls to, as
long as it is proved the involved memory location does not alias
`errno`.

Previous discussion: https://discourse.llvm.org/t/rfc-modelling-errno-memory-effects/82972.
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<pre>
Let Clang emit `llvm.tbaa.errno` metadata in order to let LLVM
carry out optimizations around errno-writing libcalls to, as
long as it is proved the involved memory location does not alias
`errno`.

Previous discussion: https://discourse.llvm.org/t/rfc-modelling-errno-memory-effects/82972.
</pre>
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</content>
</entry>
<entry>
<title>[clang] Regenerate test checks including TBAA semantics (NFC)</title>
<updated>2025-09-12T16:37:59+00:00</updated>
<author>
<name>Antonio Frighetto</name>
<email>me@antoniofrighetto.com</email>
</author>
<published>2025-09-12T16:35:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=04d38bed70698d8591b3ac7b6b13635b1e894c5a'/>
<id>04d38bed70698d8591b3ac7b6b13635b1e894c5a</id>
<content type='text'>
Tests exercizing TBAA metadata (both purposefully and not), and
previously generated via UTC, have been regenerated and updated
to version 6.
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<pre>
Tests exercizing TBAA metadata (both purposefully and not), and
previously generated via UTC, have been regenerated and updated
to version 6.
</pre>
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</content>
</entry>
<entry>
<title>[IR] Remove size argument from lifetime intrinsics (#150248)</title>
<updated>2025-08-08T09:09:34+00:00</updated>
<author>
<name>Nikita Popov</name>
<email>npopov@redhat.com</email>
</author>
<published>2025-08-08T09:09:34+00:00</published>
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<id>c23b4fbdbb70f04e637b488416d8e42449bfa1fb</id>
<content type='text'>
Now that #149310 has restricted lifetime intrinsics to only work on
allocas, we can also drop the explicit size argument. Instead, the size
is implied by the alloca.

This removes the ability to only mark a prefix of an alloca alive/dead.
We never used that capability, so we should remove the need to handle
that possibility everywhere (though many key places, including stack
coloring, did not actually respect this).</content>
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<pre>
Now that #149310 has restricted lifetime intrinsics to only work on
allocas, we can also drop the explicit size argument. Instead, the size
is implied by the alloca.

This removes the ability to only mark a prefix of an alloca alive/dead.
We never used that capability, so we should remove the need to handle
that possibility everywhere (though many key places, including stack
coloring, did not actually respect this).</pre>
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</content>
</entry>
<entry>
<title>[clang][CodeGen] Preserve addrspace of enqueue_kernel builtin. (#148062)</title>
<updated>2025-07-11T21:00:28+00:00</updated>
<author>
<name>jofrn</name>
<email>jofernau@amd.com</email>
</author>
<published>2025-07-11T21:00:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=15d36aa4ce6f78579c6a6a44226502621bb0c241'/>
<id>15d36aa4ce6f78579c6a6a44226502621bb0c241</id>
<content type='text'>
__enqueue_kernel_varargs' last parameter is in addrspace(5), but CodeGen
currently misses this qualifier. This commit fixes the code to preserve
the qualifier by referencing Alloca, which has its casts removed, rather
than TmpPtr.</content>
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<pre>
__enqueue_kernel_varargs' last parameter is in addrspace(5), but CodeGen
currently misses this qualifier. This commit fixes the code to preserve
the qualifier by referencing Alloca, which has its casts removed, rather
than TmpPtr.</pre>
</div>
</content>
</entry>
<entry>
<title>clang: Fix broken implicit cast to generic address space (#138863)</title>
<updated>2025-05-08T05:51:57+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-05-08T05:51:57+00:00</published>
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<id>a11d86461e7d7d9bce3d04a39ded1cad394239ca</id>
<content type='text'>
This fixes emitting undefined behavior where a 64-bit generic
pointer is written to a 32-bit slot allocated for a private pointer.
This can be seen in test/CodeGenOpenCL/amdgcn-automatic-variable.cl's
wrong_pointer_alloca.</content>
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This fixes emitting undefined behavior where a 64-bit generic
pointer is written to a 32-bit slot allocated for a private pointer.
This can be seen in test/CodeGenOpenCL/amdgcn-automatic-variable.cl's
wrong_pointer_alloca.</pre>
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</content>
</entry>
<entry>
<title>[Clang][OpenCL][AMDGPU]  OpenCL Kernel stubs should be assigned alwaysinline attribute (#137769)</title>
<updated>2025-05-07T10:12:23+00:00</updated>
<author>
<name>Aniket Lal</name>
<email>lalaniket8@gmail.com</email>
</author>
<published>2025-05-07T10:12:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=c3ce5684a8b408220eed983d065edba0e6ed5016'/>
<id>c3ce5684a8b408220eed983d065edba0e6ed5016</id>
<content type='text'>
OpenCL Kernels body is emitted as stubs and the kernel is emitted as
call to respective stub.
(https://github.com/llvm/llvm-project/pull/115821).
The stub function should be alwaysinlined, since call to stub can cause
performance drop.

Co-authored-by: anikelal &lt;anikelal@amd.com&gt;</content>
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<pre>
OpenCL Kernels body is emitted as stubs and the kernel is emitted as
call to respective stub.
(https://github.com/llvm/llvm-project/pull/115821).
The stub function should be alwaysinlined, since call to stub can cause
performance drop.

Co-authored-by: anikelal &lt;anikelal@amd.com&gt;</pre>
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</content>
</entry>
<entry>
<title>[Clang][OpenCL][AMDGPU] Allow a kernel to call another kernel (#115821)</title>
<updated>2025-04-08T04:59:30+00:00</updated>
<author>
<name>Aniket Lal</name>
<email>lalaniket8@gmail.com</email>
</author>
<published>2025-04-08T04:59:30+00:00</published>
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<id>642481a4286c9006958274531ee173b347866c50</id>
<content type='text'>
This feature is currently not supported in the compiler.
To facilitate this we emit a stub version of each kernel
function body with different name mangling scheme, and
replaces the respective kernel call-sites appropriately.
    
Fixes https://github.com/llvm/llvm-project/issues/60313
    
D120566 was an earlier attempt made to upstream a solution
for this issue.

---------

Co-authored-by: anikelal &lt;anikelal@amd.com&gt;</content>
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<pre>
This feature is currently not supported in the compiler.
To facilitate this we emit a stub version of each kernel
function body with different name mangling scheme, and
replaces the respective kernel call-sites appropriately.
    
Fixes https://github.com/llvm/llvm-project/issues/60313
    
D120566 was an earlier attempt made to upstream a solution
for this issue.

---------

Co-authored-by: anikelal &lt;anikelal@amd.com&gt;</pre>
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</content>
</entry>
<entry>
<title>[Clang][AMDGPU] Remove special handling for COV4 libraries (#132870)</title>
<updated>2025-03-28T12:35:16+00:00</updated>
<author>
<name>Joseph Huber</name>
<email>huberjn@outlook.com</email>
</author>
<published>2025-03-28T12:35:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=772173f54868eef6e1a4d40ab93b0ee6c04b1aca'/>
<id>772173f54868eef6e1a4d40ab93b0ee6c04b1aca</id>
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Summary:
When we were first porting to COV5, this lead to some ABI issues due to
a change in how we looked up the work group size. Bitcode libraries
relied on the builtins to emit code, but this was changed between
versions. This prevented the bitcode libraries, like OpenMP or libc,
from being used for both COV4 and COV5. The solution was to have this
'none' functionality which effectively emitted code that branched off of
a global to resolve to either version.

This isn't a great solution because it forced every TU to have this
variable in it. The patch in
https://github.com/llvm/llvm-project/pull/131033 removed support for
COV4 from OpenMP, which was the only consumer of this functionality.
Other users like HIP and OpenCL did not use this because they linked the
ROCm Device Library directly which has its own handling (The name was
borrowed from it after all).

So, now that we don't need to worry about backward compatibility with
COV4, we can remove this special handling. Users can still emit COV4
code, this simply removes the special handling used to make the OpenMP
device runtime bitcode version agnostic.</content>
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Summary:
When we were first porting to COV5, this lead to some ABI issues due to
a change in how we looked up the work group size. Bitcode libraries
relied on the builtins to emit code, but this was changed between
versions. This prevented the bitcode libraries, like OpenMP or libc,
from being used for both COV4 and COV5. The solution was to have this
'none' functionality which effectively emitted code that branched off of
a global to resolve to either version.

This isn't a great solution because it forced every TU to have this
variable in it. The patch in
https://github.com/llvm/llvm-project/pull/131033 removed support for
COV4 from OpenMP, which was the only consumer of this functionality.
Other users like HIP and OpenCL did not use this because they linked the
ROCm Device Library directly which has its own handling (The name was
borrowed from it after all).

So, now that we don't need to worry about backward compatibility with
COV4, we can remove this special handling. Users can still emit COV4
code, this simply removes the special handling used to make the OpenMP
device runtime bitcode version agnostic.</pre>
</div>
</content>
</entry>
<entry>
<title>Reapply "[AMDGPU] Use COV6 by default (#118515)" (#130963)</title>
<updated>2025-03-21T19:26:45+00:00</updated>
<author>
<name>Shilei Tian</name>
<email>i@tianshilei.me</email>
</author>
<published>2025-03-21T19:26:45+00:00</published>
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<id>f1ac2afe213f2e438e2959fe54578776e6919fe2</id>
<content type='text'>
This reverts commit 68bcba6d7a1cc18996c0bcb7c62267c62d2040d0.</content>
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<pre>
This reverts commit 68bcba6d7a1cc18996c0bcb7c62267c62d2040d0.</pre>
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