As per #142559, this marks ftrunc as legal for Neon and upgrades the existing arm.neon.vrintz intrinsics.
Adds support for __sys Clang builtin for AArch64 __sys is a long existing MSVC intrinsic used to manage caches, tlbs, etc by writing to system registers: * It takes a macro-generated constant and uses it to form the AArch64 SYS instruction which is MSR with op0=1. The macro drops op0 and expects the implementation to hardcode it to 1 in the encoding. * Volume use is in systems code (kernels, hypervisors, boot environments, firmware) * Has an unused return value due to MSVC cut/paste error Implementation: * Clang builtin, sharing code with Read/WriteStatusReg * Hardcodes the op0=1 * Explicitly returns 0 * Code-format change from clang-format * Unittests included * Not limited to MSVC-environment as its generally useful and neutral
This will enable removal of a hack from the wasm backend in a future change. This feels unnecessarily clunky. I would assume something was automatically parsing this and propagating it in the C++ case, but I can't seem to find it. In particular it feels wrong that I need to parse out the individual values, given they are listed in the options.td file. We should also be parsing and forwarding every flag that corresponds to something else in TargetOptions, which requires auditing.
As per #142559, this marks fceil as legal for Neon and upgrades the existing arm.neon.vrintp intrinsics.
As the data layout a few lines further up specifies, the int, long and pointer alignment should be 16 instead of the default of 32. The long long alignment is also incorrect, but that would require a change to the data layout as well. Comparison with GCC, which consistently uses 2 byte alignment: https://gcc.godbolt.org/z/K3x6a7dEf At least based on some spot checks, the changes to bit field layout also make use match GCC now. This was found by https://github.com/llvm/llvm-project/pull/144720.
This patch makes determining alignment and width of BitInt to be target ABI specific and makes it consistent with [Procedure Call Standard for the LoongArch™ Architecture] for LoongArch target (https://github.com/loongson/la-abi-specs/blob/release/lapcs.adoc).
As per #142559, this marks fround as legal for Neon and upgrades the existing arm.neon.vrinta intrinsics.
Adds FP8 variants for existing VST1, VST2, VST3 & VST4 intrinsics.
Add mfloat8_t support for the following Neon load intrinsics. - VLD1 - VLD1_X2 - VLD1_X3 - VLD1_X4 - VLD1_LANE - VLD1_DUP - VLD2 - VLD3 - VLD4 - VLD2_DUP - VLD3_DUP - VLD4_DUP - VLD2_LANE - VLD3_LANE - VLD4_LANE