llvm-project.git/clang/test/CodeGen/amdgpu-address-spaces.cpp, branch users/nico/python-2 Unnamed repository; edit this file 'description' to name the repository. [Clang][AMDGPU] Remove special handling for COV4 libraries (#132870) 2025-03-28T12:35:16+00:00 Joseph Huber huberjn@outlook.com 2025-03-28T12:35:16+00:00 772173f54868eef6e1a4d40ab93b0ee6c04b1aca Summary: When we were first porting to COV5, this lead to some ABI issues due to a change in how we looked up the work group size. Bitcode libraries relied on the builtins to emit code, but this was changed between versions. This prevented the bitcode libraries, like OpenMP or libc, from being used for both COV4 and COV5. The solution was to have this 'none' functionality which effectively emitted code that branched off of a global to resolve to either version. This isn't a great solution because it forced every TU to have this variable in it. The patch in https://github.com/llvm/llvm-project/pull/131033 removed support for COV4 from OpenMP, which was the only consumer of this functionality. Other users like HIP and OpenCL did not use this because they linked the ROCm Device Library directly which has its own handling (The name was borrowed from it after all). So, now that we don't need to worry about backward compatibility with COV4, we can remove this special handling. Users can still emit COV4 code, this simply removes the special handling used to make the OpenMP device runtime bitcode version agnostic. 
Summary:
When we were first porting to COV5, this lead to some ABI issues due to
a change in how we looked up the work group size. Bitcode libraries
relied on the builtins to emit code, but this was changed between
versions. This prevented the bitcode libraries, like OpenMP or libc,
from being used for both COV4 and COV5. The solution was to have this
'none' functionality which effectively emitted code that branched off of
a global to resolve to either version.

This isn't a great solution because it forced every TU to have this
variable in it. The patch in
https://github.com/llvm/llvm-project/pull/131033 removed support for
COV4 from OpenMP, which was the only consumer of this functionality.
Other users like HIP and OpenCL did not use this because they linked the
ROCm Device Library directly which has its own handling (The name was
borrowed from it after all).

So, now that we don't need to worry about backward compatibility with
COV4, we can remove this special handling. Users can still emit COV4
code, this simply removes the special handling used to make the OpenMP
device runtime bitcode version agnostic.
 Reapply "[AMDGPU] Use COV6 by default (#118515)" (#130963) 2025-03-21T19:26:45+00:00 Shilei Tian i@tianshilei.me 2025-03-21T19:26:45+00:00 f1ac2afe213f2e438e2959fe54578776e6919fe2 This reverts commit 68bcba6d7a1cc18996c0bcb7c62267c62d2040d0. 
This reverts commit 68bcba6d7a1cc18996c0bcb7c62267c62d2040d0.
 Revert "[AMDGPU] Use COV6 by default (#118515)" 2024-12-04T01:17:06+00:00 Shilei Tian i@tianshilei.me 2024-12-04T01:17:06+00:00 68bcba6d7a1cc18996c0bcb7c62267c62d2040d0 This reverts commit 410cbe3cf28913cca2fc61b3437306b841d08172 because some buildbots are not ready yet. 
This reverts commit 410cbe3cf28913cca2fc61b3437306b841d08172 because some
buildbots are not ready yet.
[AMDGPU] Use COV6 by default (#118515) 2024-12-04T00:38:35+00:00 Shilei Tian i@tianshilei.me 2024-12-04T00:38:35+00:00 410cbe3cf28913cca2fc61b3437306b841d08172 






[AMDGPU] Change default AMDHSA Code Object version to 5 (#79038)
2024-01-23T11:38:18+00:00

Saiyedul Islam
Saiyedul.Islam@amd.com

2024-01-23T11:38:18+00:00

082f87c9d418eb7b5a731e16b50e6649e387cb5a

Also update LIT tests and docs.
For more details, see
https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata

Corresponding llvm-objdump AMDGPU lit tests are updated
in a follow-up PR.




Also update LIT tests and docs.
For more details, see
https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata

Corresponding llvm-objdump AMDGPU lit tests are updated
in a follow-up PR.






[OpenMP] Cleanup and fixes for ABI agnostic DeviceRTL (#71234)
2023-11-09T05:04:35+00:00

Saiyedul Islam
Saiyedul.Islam@amd.com

2023-11-09T05:04:35+00:00

21861991e760e7e845dc1be5b804c950543d699a

Fixes the DeviceRTL compilation to ensure it is ABI agnostic. Uses
already available global variable "oclc_ABI_version" instead of
"llvm.amdgcn.abi.verion".

It also adds some minor fields in ImplicitArg structure.




Fixes the DeviceRTL compilation to ensure it is ABI agnostic. Uses
already available global variable "oclc_ABI_version" instead of
"llvm.amdgcn.abi.verion".

It also adds some minor fields in ImplicitArg structure.






[Clang][AMDGPU] Permit language address spaces for AMDGPU globals (#66205)
2023-09-13T13:43:01+00:00

Joseph Huber
35342157+jhuber6@users.noreply.github.com

2023-09-13T13:43:01+00:00

1b7a095e274d23065af8f576eb64ab26e4204c2b

Summary:
Currently, there is an assertion that prevents us from emitting an
AMDGPU global with a non-target specific address space (i.e. numerical
attribute). I'm unsure what the original intentions of this assertion
were, but we should be able to use OpenCL address spaces when compiling
directly to AMDGPU from C++. This is permitted on NVPTX so I'm unsure
what this assertion is guarding. The patch simply removes the assertion
and adds a test to ensure that these emit the expected address spaces.

Fixes https://github.com/llvm/llvm-project/issues/65069




Summary:
Currently, there is an assertion that prevents us from emitting an
AMDGPU global with a non-target specific address space (i.e. numerical
attribute). I'm unsure what the original intentions of this assertion
were, but we should be able to use OpenCL address spaces when compiling
directly to AMDGPU from C++. This is permitted on NVPTX so I'm unsure
what this assertion is guarding. The patch simply removes the assertion
and adds a test to ensure that these emit the expected address spaces.

Fixes https://github.com/llvm/llvm-project/issues/65069