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<title>llvm-project.git/clang/lib/CodeGen/TargetBuiltins/ARM.cpp, branch users/nico/python-1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/'/>
<entry>
<title>[ARM] Add neon vector support for trunc</title>
<updated>2025-07-03T06:41:13+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2025-07-03T06:41:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=1f8f477bd03869a9b5b2e7ff0c24c74397aba486'/>
<id>1f8f477bd03869a9b5b2e7ff0c24c74397aba486</id>
<content type='text'>
As per #142559, this marks ftrunc as legal for Neon and upgrades the existing
arm.neon.vrintz intrinsics.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As per #142559, this marks ftrunc as legal for Neon and upgrades the existing
arm.neon.vrintz intrinsics.
</pre>
</div>
</content>
</entry>
<entry>
<title>__sys builtin support for AArch64 (#146456)</title>
<updated>2025-07-02T17:17:01+00:00</updated>
<author>
<name>Adam Glass</name>
<email>adamglass@microsoft.com</email>
</author>
<published>2025-07-02T17:17:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ed27f18e324de1441bb062c6b2ffd2be5875a952'/>
<id>ed27f18e324de1441bb062c6b2ffd2be5875a952</id>
<content type='text'>
Adds support for __sys Clang builtin for AArch64

__sys is a long existing MSVC intrinsic used to manage caches, tlbs, etc
by writing to system registers:
* It takes a macro-generated constant and uses it to form the AArch64 SYS instruction which is MSR with op0=1. The macro drops op0 and expects the implementation to hardcode it to 1 in the encoding.
* Volume use is in systems code (kernels, hypervisors, boot environments, firmware)
* Has an unused return value due to MSVC cut/paste error

Implementation:
* Clang builtin, sharing code with Read/WriteStatusReg
* Hardcodes the op0=1
* Explicitly returns 0
* Code-format change from clang-format
* Unittests included
* Not limited to MSVC-environment as its generally useful and neutral</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Adds support for __sys Clang builtin for AArch64

__sys is a long existing MSVC intrinsic used to manage caches, tlbs, etc
by writing to system registers:
* It takes a macro-generated constant and uses it to form the AArch64 SYS instruction which is MSR with op0=1. The macro drops op0 and expects the implementation to hardcode it to 1 in the encoding.
* Volume use is in systems code (kernels, hypervisors, boot environments, firmware)
* Has an unused return value due to MSVC cut/paste error

Implementation:
* Clang builtin, sharing code with Read/WriteStatusReg
* Hardcodes the op0=1
* Explicitly returns 0
* Code-format change from clang-format
* Unittests included
* Not limited to MSVC-environment as its generally useful and neutral</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] Add neon vector support for ceil</title>
<updated>2025-07-01T14:41:10+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2025-07-01T14:41:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=5332534b9cb6477a973d1581690ae35c31f9e310'/>
<id>5332534b9cb6477a973d1581690ae35c31f9e310</id>
<content type='text'>
As per #142559, this marks fceil as legal for Neon and upgrades the existing
arm.neon.vrintp intrinsics.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As per #142559, this marks fceil as legal for Neon and upgrades the existing
arm.neon.vrintp intrinsics.
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] Add neon vector support for round</title>
<updated>2025-06-30T16:15:26+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2025-06-30T16:15:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6bd9ff04afdfbef1cf753f2cdd8a4e85ef6685eb'/>
<id>6bd9ff04afdfbef1cf753f2cdd8a4e85ef6685eb</id>
<content type='text'>
As per #142559, this marks fround as legal for Neon and upgrades the existing
arm.neon.vrinta intrinsics.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As per #142559, this marks fround as legal for Neon and upgrades the existing
arm.neon.vrinta intrinsics.
</pre>
</div>
</content>
</entry>
<entry>
<title>[ARM] Add neon vector support for floor (#142559)</title>
<updated>2025-06-29T10:37:16+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2025-06-29T10:37:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=dcc9e36b18264aef4008b88c4ae38e33151c3345'/>
<id>dcc9e36b18264aef4008b88c4ae38e33151c3345</id>
<content type='text'>
This marks ffloor as legal providing that armv8 and neon is present (or
fullfp16 for the fp16 instructions). The existing arm_neon_vrintm
intrinsics are auto-upgraded to llvm.floor.

If this is OK I will update the other vrint intrinsics.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This marks ffloor as legal providing that armv8 and neon is present (or
fullfp16 for the fp16 instructions). The existing arm_neon_vrintm
intrinsics are auto-upgraded to llvm.floor.

If this is OK I will update the other vrint intrinsics.</pre>
</div>
</content>
</entry>
<entry>
<title>InterlockedAdd_*, InterlockedAdd64_* support for AArch64 (#145607)</title>
<updated>2025-06-25T19:09:30+00:00</updated>
<author>
<name>Adam Glass</name>
<email>adamglass@spottedfoobar.com</email>
</author>
<published>2025-06-25T19:09:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=d9a7b1647984dd6f7059069fcffe23dc1d1438b1'/>
<id>d9a7b1647984dd6f7059069fcffe23dc1d1438b1</id>
<content type='text'>
This PR adds support for InterlockedAdd_{acq, nf, rel}, and
InterlockedAdd64_{acq, nf, rel} for Aarch64.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This PR adds support for InterlockedAdd_{acq, nf, rel}, and
InterlockedAdd64_{acq, nf, rel} for Aarch64.</pre>
</div>
</content>
</entry>
<entry>
<title>[CodeGen] Use range-based for loops (NFC) (#145142)</title>
<updated>2025-06-21T15:20:57+00:00</updated>
<author>
<name>Kazu Hirata</name>
<email>kazu@google.com</email>
</author>
<published>2025-06-21T15:20:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=ae372bfca890cc7a67553b3cb19134359b66c0e1'/>
<id>ae372bfca890cc7a67553b3cb19134359b66c0e1</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>[NFC][LLVM] Refactor IRBuilder::Create{VScale,ElementCount,TypeSize}. (#142803)</title>
<updated>2025-06-10T11:35:59+00:00</updated>
<author>
<name>Paul Walker</name>
<email>paul.walker@arm.com</email>
</author>
<published>2025-06-10T11:35:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=f43aaf90df6153f39c6cfd3471fec5dea1a0b650'/>
<id>f43aaf90df6153f39c6cfd3471fec5dea1a0b650</id>
<content type='text'>
CreateVScale took a scaling parameter that had a single use outside of
IRBuilder with all other callers having to create a redundant
ConstantInt. To work round this some code perferred to use
CreateIntrinsic directly.

This patch simplifies CreateVScale to return a call to the llvm.vscale()
intrinsic and nothing more. As well as simplifying the existing call
sites I've also migrated the uses of CreateIntrinsic.

Whilst IRBuilder used CreateVScale's scaling parameter as part of the
implementations of CreateElementCount and CreateTypeSize, I have
follow-on work to switch them to the NUW varaiety and thus they would
stop using CreateVScale's scaling as well. To prepare for this I have
moved the multiplication and constant folding into the implementations
of CreateElementCount and CreateTypeSize.

As a final step I have replaced some callers of CreateVScale with
CreateElementCount where it's clear from the code they wanted the
latter.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CreateVScale took a scaling parameter that had a single use outside of
IRBuilder with all other callers having to create a redundant
ConstantInt. To work round this some code perferred to use
CreateIntrinsic directly.

This patch simplifies CreateVScale to return a call to the llvm.vscale()
intrinsic and nothing more. As well as simplifying the existing call
sites I've also migrated the uses of CreateIntrinsic.

Whilst IRBuilder used CreateVScale's scaling parameter as part of the
implementations of CreateElementCount and CreateTypeSize, I have
follow-on work to switch them to the NUW varaiety and thus they would
stop using CreateVScale's scaling as well. To prepare for this I have
moved the multiplication and constant folding into the implementations
of CreateElementCount and CreateTypeSize.

As a final step I have replaced some callers of CreateVScale with
CreateElementCount where it's clear from the code they wanted the
latter.</pre>
</div>
</content>
</entry>
<entry>
<title>[Clang][AArch64] Add fp8 variants for untyped NEON intrinsics (#128019)</title>
<updated>2025-05-15T13:01:41+00:00</updated>
<author>
<name>Lukacma</name>
<email>Marian.Lukac@arm.com</email>
</author>
<published>2025-05-15T13:01:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=6fc031291955d5d3c69f7df9b9f7460c473d114a'/>
<id>6fc031291955d5d3c69f7df9b9f7460c473d114a</id>
<content type='text'>
This patch adds fp8 variants to existing intrinsics, whose operation
doesn't depend on arguments being a specific type.

It also changes mfloat8 type representation in memory from `i8` to
`&lt;1xi8&gt;`</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds fp8 variants to existing intrinsics, whose operation
doesn't depend on arguments being a specific type.

It also changes mfloat8 type representation in memory from `i8` to
`&lt;1xi8&gt;`</pre>
</div>
</content>
</entry>
<entry>
<title>[IRBuilder] Add versions of createInsertVector/createExtractVector that take a uint64_t index. (#138324)</title>
<updated>2025-05-02T23:10:18+00:00</updated>
<author>
<name>Craig Topper</name>
<email>craig.topper@sifive.com</email>
</author>
<published>2025-05-02T23:10:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=123758b1f4a8106926d95268ea8dc27158b6393a'/>
<id>123758b1f4a8106926d95268ea8dc27158b6393a</id>
<content type='text'>
Most callers want a constant index. Instead of making every caller
create a ConstantInt, we can do it in IRBuilder. This is similar to
createInsertElement/createExtractElement.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Most callers want a constant index. Instead of making every caller
create a ConstantInt, we can do it in IRBuilder. This is similar to
createInsertElement/createExtractElement.</pre>
</div>
</content>
</entry>
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