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<title>llvm-project.git, branch users/vitalybuka/spr/-initial-version-1</title>
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<entry>
<title>[𝘀𝗽𝗿] initial version</title>
<updated>2024-07-09T23:43:42+00:00</updated>
<author>
<name>Vitaly Buka</name>
<email>vitalybuka@google.com</email>
</author>
<published>2024-07-09T23:43:42+00:00</published>
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Created using spr 1.3.4
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Created using spr 1.3.4
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</entry>
<entry>
<title>[rtsan] Temporarily disable runtime to fix bots after #92460</title>
<updated>2024-07-09T18:29:34+00:00</updated>
<author>
<name>Vitaly Buka</name>
<email>vitalybuka@google.com</email>
</author>
<published>2024-07-09T18:28:18+00:00</published>
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</entry>
<entry>
<title>[libc++][TZDB] Finishes zoned_time constructors. (#95010)</title>
<updated>2024-07-09T18:15:49+00:00</updated>
<author>
<name>Mark de Wever</name>
<email>koraq@xs4all.nl</email>
</author>
<published>2024-07-09T18:15:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=a1d73ace13a20ed122a66d3d59f0cbae58d0f669'/>
<id>a1d73ace13a20ed122a66d3d59f0cbae58d0f669</id>
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Completes
- LWG3225 zoned_time converting constructor shall not be noexcept
- LWG3226 zoned_time constructor from string_view should accept
zoned_time&lt;Duration2, TimeZonePtr2&gt;

Implements parts of:
- P0355 Extending to chrono Calendars and Time Zones</content>
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Completes
- LWG3225 zoned_time converting constructor shall not be noexcept
- LWG3226 zoned_time constructor from string_view should accept
zoned_time&lt;Duration2, TimeZonePtr2&gt;

Implements parts of:
- P0355 Extending to chrono Calendars and Time Zones</pre>
</div>
</content>
</entry>
<entry>
<title>[libc++][TZDB] Adds basics of zoned_time class. (#94999)</title>
<updated>2024-07-09T18:14:40+00:00</updated>
<author>
<name>Mark de Wever</name>
<email>koraq@xs4all.nl</email>
</author>
<published>2024-07-09T18:14:40+00:00</published>
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<id>dda41848083988f2e4a3355252604306d5866566</id>
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This implements the class, its non-templated constructors and its
getters to verify the construction.

Completes
- LWG3224 zoned_time constructor from TimeZonePtr does not specify
initialization of tp_

Implements parts of:
- P0355 Extending chrono to Calendars and Time Zones</content>
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<pre>
This implements the class, its non-templated constructors and its
getters to verify the construction.

Completes
- LWG3224 zoned_time constructor from TimeZonePtr does not specify
initialization of tp_

Implements parts of:
- P0355 Extending chrono to Calendars and Time Zones</pre>
</div>
</content>
</entry>
<entry>
<title>[test][PAC][AArch64] Add ELF tests for subtarget-neutral codegen (#98020)</title>
<updated>2024-07-09T18:00:55+00:00</updated>
<author>
<name>Daniil Kovalev</name>
<email>dkovalev@accesssoftek.com</email>
</author>
<published>2024-07-09T18:00:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=746f5726158d31aeeb1fd12b226dc869834a7ad2'/>
<id>746f5726158d31aeeb1fd12b226dc869834a7ad2</id>
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Many parts of PAuth-related codegen are not MachO- or ELF-specific. Add
RUN lines against ELF targets to ensure that codegen works for ELF as
well as for MachO.</content>
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Many parts of PAuth-related codegen are not MachO- or ELF-specific. Add
RUN lines against ELF targets to ensure that codegen works for ELF as
well as for MachO.</pre>
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</content>
</entry>
<entry>
<title>[compiler-rt] Realtime Sanitizer: Introduce Realtime Sanitizer (RTSan) backend (#92460)</title>
<updated>2024-07-09T18:00:38+00:00</updated>
<author>
<name>Chris Apple</name>
<email>cja-private@pm.me</email>
</author>
<published>2024-07-09T18:00:38+00:00</published>
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<id>1adb55b1c4bfd21752e6b2718c3c4b8abb203d09</id>
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Introducing the main runtime of realtime sanitizer. For more
information, please see the [discourse
thread](https://discourse.llvm.org/t/rfc-nolock-and-noalloc-attributes/76837).
We have also put together a [reviewer support
document](https://github.com/realtime-sanitizer/radsan/blob/doc/review-support/doc/review.md)
to show what our intention is.

This review introduces the sanitizer backend. This includes:
* CMake build files (largely adapted from asan).
* Main RTSan architecture (the external API, thread local context,
stack).
* Interceptors.
* Many unit tests.

Please see the [reviewer support
document](https://github.com/realtime-sanitizer/radsan/blob/doc/review-support/doc/review.md)
for what our next steps are. We are moving in lockstep with this PR
#84983 for the codegen coming up next.

Note to reviewers: If you see support documentation mention "RADSan",
this was the "old acronym" for the realtime sanitizer, they refer to the
same thing. If you see it let us know and we can correct it (especially
in the llvm codebase)

---------

Co-authored-by: David Trevelyan &lt;david.trevelyan@gmail.com&gt;</content>
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Introducing the main runtime of realtime sanitizer. For more
information, please see the [discourse
thread](https://discourse.llvm.org/t/rfc-nolock-and-noalloc-attributes/76837).
We have also put together a [reviewer support
document](https://github.com/realtime-sanitizer/radsan/blob/doc/review-support/doc/review.md)
to show what our intention is.

This review introduces the sanitizer backend. This includes:
* CMake build files (largely adapted from asan).
* Main RTSan architecture (the external API, thread local context,
stack).
* Interceptors.
* Many unit tests.

Please see the [reviewer support
document](https://github.com/realtime-sanitizer/radsan/blob/doc/review-support/doc/review.md)
for what our next steps are. We are moving in lockstep with this PR
#84983 for the codegen coming up next.

Note to reviewers: If you see support documentation mention "RADSan",
this was the "old acronym" for the realtime sanitizer, they refer to the
same thing. If you see it let us know and we can correct it (especially
in the llvm codebase)

---------

Co-authored-by: David Trevelyan &lt;david.trevelyan@gmail.com&gt;</pre>
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</content>
</entry>
<entry>
<title>[libc] adjust printf macro test to use all 64 bits (#98195)</title>
<updated>2024-07-09T17:55:34+00:00</updated>
<author>
<name>Michael Jones</name>
<email>michaelrj@google.com</email>
</author>
<published>2024-07-09T17:55:34+00:00</published>
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The previous printf macro test for 64 bit octal used the number 0123,
which is not large enough to ensure that the macro is actually reading a
64 bit number. This patch enlarges the number, and also makes sure the
return value of sprintf is correct for the macro tests.</content>
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<pre>
The previous printf macro test for 64 bit octal used the number 0123,
which is not large enough to ensure that the macro is actually reading a
64 bit number. This patch enlarges the number, and also makes sure the
return value of sprintf is correct for the macro tests.</pre>
</div>
</content>
</entry>
<entry>
<title>[MachineSink] Fix missing sinks along critical edges (#97618)</title>
<updated>2024-07-09T17:48:22+00:00</updated>
<author>
<name>Min-Yih Hsu</name>
<email>min.hsu@sifive.com</email>
</author>
<published>2024-07-09T17:48:22+00:00</published>
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<id>7e2f96194fa56148281c0232b4fa0db5c9cabec3</id>
<content type='text'>
4e0bd3f improved early MachineLICM's capabilities to hoist COPY from
physical registers out of a loop. However, it accidentally broke one of
MachineSink's preconditions on sinking cheap instructions (in this case,
COPY) which considered those instructions being profitable to sink only
when there are at least two of them in the same def-use chain in the
same basic block. So if early MachineLICM hoisted one of them out,
MachineSink no longer sink rest of the cheap instructions. This results
in redundant load immediate instructions from the motivating example
we've seen on RISC-V.

This patch fixes this by teaching MachineSink that if there is more than
one demand to sink a register into the same block from different
critical edges, it should be considered profitable as it increases the
CSE opportunities.
This change also improves two of the AArch64's cases.</content>
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4e0bd3f improved early MachineLICM's capabilities to hoist COPY from
physical registers out of a loop. However, it accidentally broke one of
MachineSink's preconditions on sinking cheap instructions (in this case,
COPY) which considered those instructions being profitable to sink only
when there are at least two of them in the same def-use chain in the
same basic block. So if early MachineLICM hoisted one of them out,
MachineSink no longer sink rest of the cheap instructions. This results
in redundant load immediate instructions from the motivating example
we've seen on RISC-V.

This patch fixes this by teaching MachineSink that if there is more than
one demand to sink a register into the same block from different
critical edges, it should be considered profitable as it increases the
CSE opportunities.
This change also improves two of the AArch64's cases.</pre>
</div>
</content>
</entry>
<entry>
<title>Reapply "[RISCV] Remove experimental from Ztso. (#96465)"</title>
<updated>2024-07-09T17:45:56+00:00</updated>
<author>
<name>Philip Reames</name>
<email>preames@rivosinc.com</email>
</author>
<published>2024-07-09T16:47:45+00:00</published>
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This was reverted in f985a8826bfa4ca3d23e654185de35e30ea6dc79.  Since that,
the default WMO lowering has moved to A67 compatible, the ABI attribute
emission has landed (off by default), and the LLD change to merge said
attributes have landed.  Our ztso lowering is believed to also be A67
compatible, and no known issues remain.

Original commit message:

Ztso 1.0 was ratified in January 2023.
Documentation:
https://github.com/riscv/riscv-isa-manual/blob/main/src/ztso-st-ext.adoc
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This was reverted in f985a8826bfa4ca3d23e654185de35e30ea6dc79.  Since that,
the default WMO lowering has moved to A67 compatible, the ABI attribute
emission has landed (off by default), and the LLD change to merge said
attributes have landed.  Our ztso lowering is believed to also be A67
compatible, and no known issues remain.

Original commit message:

Ztso 1.0 was ratified in January 2023.
Documentation:
https://github.com/riscv/riscv-isa-manual/blob/main/src/ztso-st-ext.adoc
</pre>
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</content>
</entry>
<entry>
<title>[test][MachineSink][RISCV] Pre-commit test for #97618</title>
<updated>2024-07-09T17:44:44+00:00</updated>
<author>
<name>Min Hsu</name>
<email>min.hsu@sifive.com</email>
</author>
<published>2024-07-03T17:34:33+00:00</published>
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