llvm-project.git, branch users/optimisan/amdgpu-pre-sched2 Unnamed repository; edit this file 'description' to name the repository. [AMDGPU][NPM] Fill in addPreSched2 passes 2025-07-09T08:49:22+00:00 Akshat Oke Akshat.Oke@amd.com 2025-05-07T09:40:22+00:00 a4d05859096953bb45844ba11ba3e7c989334d10 






[CodeGen][NPM] Account inserted passes for -start/stop options
2025-07-09T08:49:21+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-07T08:57:31+00:00

b0f06a702546b3ed7d89bfa3256cbeea784f2b82












add missing header file
2025-07-09T08:49:21+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-08T04:46:32+00:00

4f58c4453826e606f9b748cdc82692407d387edf












[CodeGen][NPM] Port ProcessImplicitDefs to NPM
2025-07-09T08:49:21+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-06T14:12:36+00:00

35252487f30d1f6e6045cb4ab30ddae2cceaaa90












remove entries from MachinePR.def
2025-07-09T08:49:21+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-12T08:34:10+00:00

c32c7e27f4cfbe142c98312ade5fe2c87009136f












[CodeGen][NPM] Register Function Passes
2025-07-09T08:49:21+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-06T11:04:05+00:00

069082c7d4643b40fb6c986e7bf34c251d6eb99f












[CodeGen][NPM] Read TargetMachine's EnableIPRA option
2025-07-09T08:49:20+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-06T09:55:07+00:00

7dcc3168ef19af5e5a0325332e298b9a9b2ee3e0












[CodeGen][NPM] VirtRegRewriter: Set VirtReg flag
2025-07-09T08:49:20+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-06T09:05:52+00:00

6d6546da6f88c149757ae9e60351e1a2dec7126a












[CodeGen][NPM] Port PostRAMachineSinking to NPM
2025-07-09T08:49:20+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-05T09:17:40+00:00

f39a6916b0c9fb444a728edc58916fe4cee3fc12












[AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass
2025-07-09T08:49:20+00:00

Akshat Oke
Akshat.Oke@amd.com

2025-05-05T08:58:58+00:00

961d9a4d20687f1b7ab8761982f33531e0ee173c