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<title>llvm-project.git, branch users/el-ev/float_builtin_elementwise_maxmin</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>[clang] constexpr `__builtin_elementwise_{max,min}`</title>
<updated>2025-08-14T10:15:55+00:00</updated>
<author>
<name>Iris Shi</name>
<email>0.0@owo.li</email>
</author>
<published>2025-08-14T10:08:44+00:00</published>
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<id>e43d3d00a7516d538fcd00b7b5635545739b19b4</id>
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<pre>
</pre>
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</entry>
<entry>
<title>[libc++] Remove assertions from &lt;string_view&gt; that are unreachable (#148598)</title>
<updated>2025-08-14T07:24:20+00:00</updated>
<author>
<name>Nikolas Klauser</name>
<email>nikolasklauser@berlin.de</email>
</author>
<published>2025-08-14T07:24:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=7b904b09eb2368d8e3af77df4753a1068835db54'/>
<id>7b904b09eb2368d8e3af77df4753a1068835db54</id>
<content type='text'>
When assertions are enabled it is impossible to construct a
`string_view` which contains a null pointer and a non-zero size, so
assertions where we check for that on an already constructed
`string_view` are unreachable.</content>
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<pre>
When assertions are enabled it is impossible to construct a
`string_view` which contains a null pointer and a non-zero size, so
assertions where we check for that on an already constructed
`string_view` are unreachable.</pre>
</div>
</content>
</entry>
<entry>
<title>[libc++] Document how __tree is laid out and how we iterate through it (#152453)</title>
<updated>2025-08-14T07:23:23+00:00</updated>
<author>
<name>Nikolas Klauser</name>
<email>nikolasklauser@berlin.de</email>
</author>
<published>2025-08-14T07:23:23+00:00</published>
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<id>5b258884db35716eff198438c3d66baa1d9fe32c</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[llvm] [InstCombine] fold "icmp eq (X + (V - 1)) &amp; -V, X" to "icmp eq (and X, V - 1), 0" (#152851)</title>
<updated>2025-08-14T07:23:03+00:00</updated>
<author>
<name>Pavel Skripkin</name>
<email>paskripkin@gmail.com</email>
</author>
<published>2025-08-14T07:23:03+00:00</published>
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<id>30144226a4ea916341c37759d93dc2b32502efa1</id>
<content type='text'>
This fold optimizes 

```llvm
define i1 @src(i32 %num, i32 %val) {
  %mask = add i32 %val, -1
  %neg = sub nsw i32 0, %val

  %num.biased = add i32 %num, %mask
  %_2.sroa.0.0 = and i32 %num.biased, %neg
  %_0 = icmp eq i32 %_2.sroa.0.0, %num
  ret i1 %_0
}
```
to
```llvm
define i1 @tgt(i32 %num, i32 %val) {
  %mask = add i32 %val, -1
  %tmp = and i32 %num, %mask
  %ret = icmp eq i32 %tmp, 0
  ret i1 %ret
}
```

For power-of-two `val`.

Observed in real life for following code

```rust
pub fn is_aligned(num: usize) -&gt; bool {
    num.next_multiple_of(1 &lt;&lt; 12) == num
}
```
which verifies that num is aligned to 4096.

Alive2 proof https://alive2.llvm.org/ce/z/QisECm</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This fold optimizes 

```llvm
define i1 @src(i32 %num, i32 %val) {
  %mask = add i32 %val, -1
  %neg = sub nsw i32 0, %val

  %num.biased = add i32 %num, %mask
  %_2.sroa.0.0 = and i32 %num.biased, %neg
  %_0 = icmp eq i32 %_2.sroa.0.0, %num
  ret i1 %_0
}
```
to
```llvm
define i1 @tgt(i32 %num, i32 %val) {
  %mask = add i32 %val, -1
  %tmp = and i32 %num, %mask
  %ret = icmp eq i32 %tmp, 0
  ret i1 %ret
}
```

For power-of-two `val`.

Observed in real life for following code

```rust
pub fn is_aligned(num: usize) -&gt; bool {
    num.next_multiple_of(1 &lt;&lt; 12) == num
}
```
which verifies that num is aligned to 4096.

Alive2 proof https://alive2.llvm.org/ce/z/QisECm</pre>
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</content>
</entry>
<entry>
<title>[AMDGPU] Preserve post dominator tree through SILowerControlFlow (#153528)</title>
<updated>2025-08-14T07:19:46+00:00</updated>
<author>
<name>Carl Ritson</name>
<email>carl.ritson@amd.com</email>
</author>
<published>2025-08-14T07:19:46+00:00</published>
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<id>f92afe7171fcda7b1b69fd428925dd7655021226</id>
<content type='text'>
Change dominator tree updates to also handle post dominator tree.</content>
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<pre>
Change dominator tree updates to also handle post dominator tree.</pre>
</div>
</content>
</entry>
<entry>
<title>[BranchFolding] Avoid moving blocks to fall through to an indirect target (#152916)</title>
<updated>2025-08-14T07:18:36+00:00</updated>
<author>
<name>XChy</name>
<email>xxs_chy@outlook.com</email>
</author>
<published>2025-08-14T07:18:36+00:00</published>
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<id>f393f2a61e58a74b44b4480122c08927446bddb0</id>
<content type='text'>
Depend on #152591 to fix
https://github.com/llvm/llvm-project/issues/149023.
Similar to an EH pad, there is no real advantage in "falling through" to
an indirect target of an INLINEASM_BR. And multiple indirect targets of
inline asm at the end of a function may be rotated infinitely.
Therefore, this patch avoids such optimization on indirect target of
inline asm as fall through.</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Depend on #152591 to fix
https://github.com/llvm/llvm-project/issues/149023.
Similar to an EH pad, there is no real advantage in "falling through" to
an indirect target of an INLINEASM_BR. And multiple indirect targets of
inline asm at the end of a function may be rotated infinitely.
Therefore, this patch avoids such optimization on indirect target of
inline asm as fall through.</pre>
</div>
</content>
</entry>
<entry>
<title>[AArch64] Fix ‘&gt;= 0’ is always true warning. NFC</title>
<updated>2025-08-14T07:17:10+00:00</updated>
<author>
<name>David Green</name>
<email>david.green@arm.com</email>
</author>
<published>2025-08-14T07:17:10+00:00</published>
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<id>4c28bbf5b84ffdad8ffe80c9c934b03a1435c1f1</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>ARM: Move more aeabi libcall config into tablegen (#152109)</title>
<updated>2025-08-14T06:43:15+00:00</updated>
<author>
<name>Matt Arsenault</name>
<email>Matthew.Arsenault@amd.com</email>
</author>
<published>2025-08-14T06:43:15+00:00</published>
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<id>bbcac029db2819ff7dc2ec84e883fc142a6c71ce</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>[RISCV] Add CodeGen support for qc.insbi and qc.insb insert instructions (#152447)</title>
<updated>2025-08-14T06:38:28+00:00</updated>
<author>
<name>quic_hchandel</name>
<email>quic_hchandel@quicinc.com</email>
</author>
<published>2025-08-14T06:38:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.belthelziquor.com/llvm-project.git/commit/?id=71b066e3a2512d582e34a0b5257e12b1177d4bcc'/>
<id>71b066e3a2512d582e34a0b5257e12b1177d4bcc</id>
<content type='text'>
This patch adds CodeGen support for qc.insbi and qc.insb instructions
defined in the Qualcomm uC Xqcibm extension. qc.insbi and qc.insb
inserts bits into destination register from immediate and register
operand respectively.
A sequence of `xor`, `and` &amp; `xor` depending on appropriate conditions
are converted to `qc.insbi` or `qc.insb` which depends on the
immediate's value.</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds CodeGen support for qc.insbi and qc.insb instructions
defined in the Qualcomm uC Xqcibm extension. qc.insbi and qc.insb
inserts bits into destination register from immediate and register
operand respectively.
A sequence of `xor`, `and` &amp; `xor` depending on appropriate conditions
are converted to `qc.insbi` or `qc.insb` which depends on the
immediate's value.</pre>
</div>
</content>
</entry>
<entry>
<title>[C++20] [Modules] Fix incorrect diagnostic for using befriend target</title>
<updated>2025-08-14T06:23:14+00:00</updated>
<author>
<name>Chuanqi Xu</name>
<email>yedeng.yd@linux.alibaba.com</email>
</author>
<published>2025-08-14T06:18:51+00:00</published>
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<id>ab5a5a90c03d25392fcc486a8c587d0dd9b7a0c6</id>
<content type='text'>
Close https://github.com/llvm/llvm-project/issues/138558

The compiler failed to understand the redeclaration-relationship when
performing checks when MergeFunctionDecl. This seemed to be a complex
circular problem (how can we know the redeclaration relationship before
performing merging?). But the fix seems to be easy and safe. It is fine
to only perform the check only if the using decl is a local decl.
</content>
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<pre>
Close https://github.com/llvm/llvm-project/issues/138558

The compiler failed to understand the redeclaration-relationship when
performing checks when MergeFunctionDecl. This seemed to be a complex
circular problem (how can we know the redeclaration relationship before
performing merging?). But the fix seems to be easy and safe. It is fine
to only perform the check only if the using decl is a local decl.
</pre>
</div>
</content>
</entry>
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