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r288433 | oranevskyy | 2016-12-01 14:58:35 -0800 (Thu, 01 Dec 2016) | 24 lines

[ARM] Fix for 64-bit CAS expansion on ARM32 with -O0

Summary:
This patch fixes comparison of 64-bit atomic with its expected value in CMP_SWAP_64 expansion.

Currently, the low words are compared with CMP, while the high words are compared with SBC. SBC expects the carry flag to be set if CMP detects a difference. CMP might leave the carry unset for unequal arguments though if the first one is >= than the second. This might cause the comparison logic to detect false equality.

Example of the broken C++ code:
```
std::atomic<long long> at(2);

long long ll = 1;
std::atomic_compare_exchange_strong(&at, &ll, 3);
```
Even though the atomic `at` and the expected value `ll` are not equal and `atomic_compare_exchange_strong` returns `false`, `at` is changed to 3.

The patch replaces SBC with CMPEQ.

Reviewers: t.p.northover

Subscribers: aemerson, rengolin, llvm-commits, asl

Differential Revision: https://reviews.llvm.org/D27315

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llvm-svn: 288847

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r288418 | tnorthover | 2016-12-01 13:31:59 -0800 (Thu, 01 Dec 2016) | 13 lines

AArch64: fix 128-bit cmpxchg at -O0 (again, again).

This time the issue is fortunately just a simple mistake rather than a horrible
design spectre. I thought SUBS/SBCS provided sufficient NZCV flags for
comparing two 64-bit values, but they don't.

The fix is slightly clunkier in AArch64 because we can't use conditional
execution to emit a pair of CMPs. Traditionally an "icmp ne i128" would map to
an EOR/EOR/ORR/CBNZ, but that uses more registers so it's easier to go with a
CSET/CINC/CBNZ combination. Slightly less efficient, but this is -O0 anyway.

Thanks to Anton Korobeynikov for pointing out the issue.

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llvm-svn: 288846

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r277755 | tnorthover | 2016-08-04 12:32:28 -0700 (Thu, 04 Aug 2016) | 5 lines

AArch64: don't assume all i128s are BUILD_PAIRs

It leads to a crash when they're not. I'm *sure* I've made this mistake before,
at least once.

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llvm-svn: 288845

Fixes a bug encountered in RC2 validation.

llvm-svn: 288513

This reverts commit r288454.  This was committed accidently.

llvm-svn: 288456

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r287360 | hans | 2016-11-18 10:27:31 -0800 (Fri, 18 Nov 2016) | 2 lines

Fix test from r287353: don't use /dev/null

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llvm-svn: 288455

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r278268 | nhaehnle | 2016-08-10 11:51:14 -0700 (Wed, 10 Aug 2016) | 28 lines

LiveIntervalAnalysis: fix a crash in repairOldRegInRange

Summary:
See the new test case for one that was (non-deterministically) crashing
on trunk and deterministically hit the assertion that I added in D23302.
Basically, the machine function contains a sequence

     DS_WRITE_B32 %vreg4, %vreg14:sub0, ...
     DS_WRITE_B32 %vreg4, %vreg14:sub0, ...
     %vreg14:sub1<def> = COPY %vreg14:sub0

and SILoadStoreOptimizer::mergeWrite2Pair merges the two DS_WRITE_B32
instructions into one before calling repairIntervalsInRange.

Now repairIntervalsInRange wants to repair %vreg14, in particular, and
ends up trying to repair %vreg14:sub1 as well, but that only becomes
active _after_ the range that is to be repaired, hence the crash due
to LR.find(...) == LR.begin() at the start of repairOldRegInRange.

I believe that just skipping those subrange is fine, but again, not too
familiar with that code.

Reviewers: MatzeB, kparzysz, tstellarAMD

Subscribers: llvm-commits, MatzeB

Differential Revision: https://reviews.llvm.org/D23303

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llvm-svn: 288454

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r280120 | niels_ole | 2016-08-30 11:00:22 -0700 (Tue, 30 Aug 2016) | 4 lines

Basic/Targets.cpp: Add polaris10 and polaris11 gpus

Differential Revision: https://reviews.llvm.org/D23746

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llvm-svn: 288149

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r284620 | simon.dardis | 2016-10-19 10:50:52 -0700 (Wed, 19 Oct 2016) | 14 lines

[mips][msa] Range check MSA intrinsics with immediates

This patch teaches clang to range check immediates for MIPS MSA instrinsics.
This checking is done strictly in comparison to some existing GCC
implementations. E.g. msa_andvi_b(var, 257) does not result in andvi $wX, 1.
Similarily msa_ldi_b takes a range of -128 to 127.

As part of this effort, correct the existing MSA test as it has both illegal
types and immediates.

Reviewers: vkalintiris

Differential Revision: https://reviews.llvm.org/D25017

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llvm-svn: 288109

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r281975 | simon.dardis | 2016-09-20 08:07:36 -0700 (Tue, 20 Sep 2016) | 9 lines

[mips] MSA intrinsics header file

This patch adds the msa.h header file containing the shorter names for the
MSA instrinsics, e.g. msa_sll_b for builtin_msa_sll_b.

Reviewers: vkalintiris, zoran.jovanovic

Differential Review: https://reviews.llvm.org/D24674

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llvm-svn: 288108