Reviewers: hansw, jdoerfert Subscribers: sylvestre.ledru, mgorny, hans, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70460 (cherry picked from commit edf6717d8d30034da932b95350898e03c90a5082)
------------------------------------------------------------------------ r372480 | ssarda | 2019-09-21 11:16:37 -0700 (Sat, 21 Sep 2019) | 9 lines SROA: Check Total Bits of vector type While Promoting alloca instruction of Vector Type, Check total size in bits of its slices too. If they don't match, don't promote the alloca instruction. Bug : https://bugs.llvm.org/show_bug.cgi?id=42585 ------------------------------------------------------------------------
------------------------------------------------------------------------ r371557 | rsmith | 2019-09-10 14:24:09 -0700 (Tue, 10 Sep 2019) | 7 lines When evaluating a __builtin_constant_p conditional, always enter constant-folding mode regardless of the original evaluation mode. In order for this to be correct, we need to track whether we're checking for a potential constant expression or checking for undefined behavior separately from the evaluation mode enum, since we don't want to clobber those states when entering constant-folding mode. ------------------------------------------------------------------------
See PR43425: https://bugs.llvm.org/show_bug.cgi?id=43425 When writing profile data on Windows we were opening profile file with exclusive read/write access. In case we are trying to write to the file from multiple processes simultaneously, subsequent calls to CreateFileA would return INVALID_HANDLE_VALUE. To fix this, I changed to open without exclusive access and then take a lock. Patch by Michael Holman! Differential revision: https://reviews.llvm.org/D70330 (cherry picked from commit 900d8a9a3b4efeefddd310e92219741d98e7270b)
These two intrinsics are lowered to calls so should prevent the formation of CTR loops. In a subsequent patch, we will handle all currently known intrinsics and prevent the formation of HW loops if any unknown intrinsics are encountered. Differential revision: https://reviews.llvm.org/D68841 (cherry picked from commit 97e36260709c541044f30092b420238511e13e5b)
------------------------------------------------------------------------ r366572 | thanm | 2019-07-19 06:13:54 -0700 (Fri, 19 Jul 2019) | 12 lines [NFC] include cstdint/string prior to using uint8_t/string Summary: include proper header prior to use of uint8_t typedef and std::string. Subscribers: llvm-commits Reviewers: cherry Tags: #llvm Differential Revision: https://reviews.llvm.org/D64937 ------------------------------------------------------------------------
------------------------------------------------------------------------ r370113 | luismarques | 2019-08-27 14:37:57 -0700 (Tue, 27 Aug 2019) | 5 lines [RISCV] Implement RISCVRegisterInfo::getPointerRegClass Fixes bug 43041 Differential Revision: https://reviews.llvm.org/D66752 ------------------------------------------------------------------------
Fixes PR43744 Differential Revision: https://reviews.llvm.org/D69968 (cherry picked from commit ce0f3ee5e4dc2eed5390b57d4a1e37c8bf17a995)
When converting reg+reg shifts to reg+imm rotates, we neglect to consider the CodeGenOnly versions of the 32-bit shift mnemonics. This means we produce a rotate with missing operands which causes a crash. Committing this fix without review since it is non-controversial that the list of mnemonics to consider should include the 64-bit aliases for the exact mnemonics. Fixes PR44183. (cherry picked from commit 241cbf201a6f4b7658697e3c76fc6e741d049a01)
The Overflow version of XO-Form instruction uses the SO, OV and OV32 special registers. This changes modifies existing multiclasses and instruction definitions to allow for the use of the XER register to record the various types if overflow from possible add, subtract and multiply instructions. It then modifies the existing instructions as to use these multiclasses as needed. Patch By: Kamau Bridgeman Differential Revision: https://reviews.llvm.org/D66902 (cherry picked from commit fdf3d1766bbabb48a397fae646facbe2690313f6)