diff options
| author | Sachin Monga <smonga@linux.ibm.com> | 2025-11-21 01:31:32 -0500 |
|---|---|---|
| committer | Sachin Monga <smonga@linux.ibm.com> | 2025-11-21 01:31:08 -0500 |
| commit | f8cdc03e1e416ab16717b47f946c033de2d9494f (patch) | |
| tree | e3497333fe3376ccf9253ff5c838ea999c34374f /sysdeps/powerpc/powerpc64/multiarch/strncmp.c | |
| parent | 040256e79b2f8874bb3f629b9de14d786785957a (diff) | |
ppc64le: Restore optimized strncmp for power10release/2.41/master
This patch addresses the actual cause of CVE-2025-5745
The vector non-volatile registers are not used anymore for
32 byte load and comparison operation
Additionally, the assembler workaround used earlier for the
instruction lxvp is replaced with actual instruction.
Signed-off-by: Sachin Monga <smonga@linux.ibm.com>
Co-authored-by: Paul Murphy <paumurph@redhat.com>
(cherry picked from commit 2ea943f7d487d6a4166658b32af7c5365889fc34)
Diffstat (limited to 'sysdeps/powerpc/powerpc64/multiarch/strncmp.c')
| -rw-r--r-- | sysdeps/powerpc/powerpc64/multiarch/strncmp.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncmp.c b/sysdeps/powerpc/powerpc64/multiarch/strncmp.c index 4cfe27fa45..0a664a620d 100644 --- a/sysdeps/powerpc/powerpc64/multiarch/strncmp.c +++ b/sysdeps/powerpc/powerpc64/multiarch/strncmp.c @@ -29,6 +29,7 @@ extern __typeof (strncmp) __strncmp_ppc attribute_hidden; extern __typeof (strncmp) __strncmp_power8 attribute_hidden; # ifdef __LITTLE_ENDIAN__ extern __typeof (strncmp) __strncmp_power9 attribute_hidden; +extern __typeof (strncmp) __strncmp_power10 attribute_hidden; # endif # undef strncmp @@ -36,6 +37,9 @@ extern __typeof (strncmp) __strncmp_power9 attribute_hidden; ifunc symbol properly. */ libc_ifunc_redirected (__redirect_strncmp, strncmp, # ifdef __LITTLE_ENDIAN__ + (hwcap2 & PPC_FEATURE2_ARCH_3_1 + && hwcap & PPC_FEATURE_HAS_VSX) + ? __strncmp_power10 : (hwcap2 & PPC_FEATURE2_ARCH_3_00 && hwcap & PPC_FEATURE_HAS_ALTIVEC) ? __strncmp_power9 : |